SOC chip lead

Kinara.ai; Pune District; On-site; INR 3,500,000 - 6,000,000; Full time

Job summary

Kinara.ai is looking for a senior SoC Technical Lead to own end-to-end program execution from architecture through tape-out and post-silicon support. You will coordinate cross-functional teams across architecture, RTL, DFT, verification, emulation, and physical design to ensure on-time, high-quality silicon deliveries.

You will drive technical decisions, align stakeholders across PMO, product marketing, and BU management, and manage schedules, risks, and recovery actions.

Qualifications

• Bachelor's degree or higher in Microelectronics, Electrical Engineering, or related disciplines.
• 15+ years of semiconductor industry experience.
• Proven experience in SoC development from architecture through tape-out.
• Strong understanding of SoC development flows including Architecture, RTL Design, Integration, Verification, DFT, Emulation, Physical Design, Silicon Validation.
• Experience leading large cross-functional engineering teams.
• Strong project execution, planning, and risk management skills.
• Excellent communication, leadership, and stakeholder management capabilities.
• Ability to influence technical direction and drive execution in a matrix organization.

Responsibilities

• Own SoC program execution from definition through tape-out and post-silicon support; ensure on-time, high-quality delivery and coordinate engineering during silicon bring-up, validation, and debug.
• Drive technical decision-making across architecture, integration, verification, implementation, validation, and system teams as the overall technical execution owner.
• Lead and align Architecture, RTL, DFT, Verification, Emulation, Physical Design, AMS, IP, and related teams; resolve dependencies and risks.
• Develop and maintain project execution plans with PMO and SoC PM; monitor schedule, resources, critical paths, and risk mitigation; drive recovery actions.
• Partner with Product Marketing, System Architecture, System Engineering, NPI PM, BU management, and external stakeholders; communicate status and risks during reviews.
• Own tape-out readiness including integration quality, sign-off, cross-functional alignment and post-silicon validation activities.

Skills

Cross-functional leadership

Project management

Risk management

Stakeholder management

Communication

Strategic thinking

Decision making

Technical leadership

Education

Bachelor's degree in Microelectronics / Electrical Engineering

Job description

Responsibilities

• End-to-End Project Ownership: Own SoC program execution from project definition through tape-out and post-silicon support. Ensure on-time, high-quality delivery of key milestones and coordinate engineering support during silicon bring-up, validation, and debug.
• Technical Leadership: Drive technical decision-making across architecture, integration, verification, implementation, validation, and system teams. Serve as the overall technical execution owner for assigned projects.
• Cross-Functional Coordination: Lead and align Architecture, RTL, DFT, Verification, Emulation, Physical Design, AMS, IP, and related engineering teams. Resolve technical dependencies, execution bottlenecks, and critical project risks.
• Program Execution & Risk Management: Develop and maintain project execution plans together with PMO and SoC PM. Monitor schedule, resource demand, critical paths, and risk mitigation plans; drive recovery actions when milestones are at risk.
• Stakeholder Management: Partner with Product Marketing, System Architecture, System Engineering, NPI PM, BU management, and external stakeholders. Communicate project status, technical readiness, key risks, and mitigation plans during management and milestone reviews.
• Tape-Out & Silicon Readiness: Own overall tape-out readiness, including integration quality, signoff closure, cross-functional alignment, and risk management. Coordinate post-silicon validation activities and engineering resources to support silicon bring-up and issue resolution.

Requirements

• Bachelors degree or higher in Microelectronics, Electrical Engineering, or related disciplines.
• 15+ years of semiconductor industry experience.
• Proven experience in SoC development from architecture through tape-out.
• Strong understanding of SoC development flows including: Architecture, RTL Design, Integration, Verification, DFT, Emulation, Physical Design, Silicon Validation.
• Experience leading large cross-functional engineering teams.
• Strong project execution, planning, and risk management skills.
• Excellent communication, leadership, and stakeholder management capabilities.
• Ability to influence technical direction and drive execution in a matrix organization.

Preferred Qualifications

• Previous experience as: Chip Lead / SoC Technical Lead / Chief Engineer / Project Technical Leader
• Experience with automotive, industrial, or safety-critical semiconductor products.
• Experience working with global development teams across multiple sites.
• Successful delivery of multiple SoC tape-outs and post-silicon product ramps.

Core Competencies

• Technical Leadership
• Cross-functional Collaboration
• Project Execution Excellence
• Risk Management
• Strategic ThinkingProblem Solving & Decision Making
• Stakeholder Management
• Communication & Influence
• Customer Focus
• Results Orientation