SMTS Verification Engineering

Rambus; Bengaluru; Hybrid; INR 1,200,000 - 2,000,000; Full time

Benefits offered by this job

Competitive compensation package

Flexible work environment

Employee benefits

Job summary

Rambus, based in Bengaluru, is hiring an SMTS Verification Engineer for its Memory Interface chips team. The successful candidate will have 5+ years of experience and expertise in System Verilog and UVM.

This full-time role emphasizes verification from design understanding to sign-off, with responsibilities that include developing test plans and guiding teams. Rambus encourages a flexible work environment with hybrid options.

Qualifications

• 5+ years of relevant experience in verification.
• Experience in developing test plans and verification infrastructure.
• Ability to communicate technical issues effectively.

Responsibilities

• Understand product requirements from specifications.
• Plan and execute to meet verification sign-off criteria.
• Guide and mentor team for successful sign-off.

Skills

System Verilog

UVM

Debugging skills

I2C/I3C Protocol knowledge

DDR3/4/5 memory protocol knowledge

Education

Bachelor's or Master's degree in Electronics

Job description

Overview

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SMTS Verification Engineer to join our Memory Interface chips team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.

As a SMTS Engineer, you’ll play a pivotal role in (DDR Verification, starting from understanding the design till Verification sign-off, and also to support the Validation team post-tapeouts). In this full time role, you’ll report directly to our Director. Our MIC team is dedicated to produce high speed DDR products at a high quality to meet the industry requirements, and your contributions will be instrumental in closing the Verification requirements of these products.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities

• Understand the product requirements from the specifications and beyond
• Planning and execution to meet the verification sign-off criteria
• Develop test plans, tests and verification infrastructure for complex Block level / IP / Sub-system using UVM methodology
• Guide and mentor the team to meet the sign-off requirements Work with architects, designers and post-silicon teams

Qualifications

• Bachelor's or Master's degree in Electronics with 5+ years of relevant experience
• Expertise in System verilog and UVM
• Strong debugging skills
• Experience in all verification aspects from understanding the design requirements till sign-off
• Should have created Testbench architectures, as well as build verification setup from scratch to ensuring successful verification closure of reasonably complex designs
• Ability to communicate technical and project issues to business and technical senior management.
• Must have very good verbal and written communication skills
• Experience in I2C/I3C Protocol & DDR3/4/5 memory protocol knowledge (preferrable)

Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application.