Signal & Power Integrity Engineer

Intel Corporation

Bengaluru

On-site

INR 3,500,000 - 7,000,000

Full time

13 days ago
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Job summary

Intel Corporation in Bengaluru seeks a senior signal integrity engineer to deliver SI solutions for high-speed boards and packages, develop interconnect models, and optimize design margins. You will simulate interconnects using 3D EM tools and define electrical specifications to guide implementation.

Collaborating with IP design and silicon teams, you will help maximize platform performance while meeting cost targets and reducing noise, jitter, and power concerns across complex systems.

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 8+ years with a Bachelor's, 6+ with a Master’s, or 4+ with a PhD.
  • Proficiency in signal integrity analysis, including simulations and validation techniques.
  • Hands-on experience with 3D EM solvers and 3D modeling tools.
  • Strong understanding of PCB and package design principles.
  • Expertise in electrical validation and debug practices.
  • Technical proficiency in noise glitch and signal/power integrity analysis.

Responsibilities

  • Delivers signal integrity solutions for large, complex highspeed platforms, boards, and packages.
  • Develops models and extracts for interconnects and defines SI rules and measurements.
  • Performs simulations to guide package and platform physical implementation and tests structures.
  • Collaborates with IP design and silicon teams to maximize platform solution space and meet targets.

Skills

Signal integrity analysis
3D EM solvers
PCB design principles
Electrical validation & debug
Noise & power integrity

Education

Bachelor's degree in Electrical/Computer Engineering

Job description

Job Details:
Job Description:

Delivers signal integrity solutions for large, complex highspeed platforms, boards, and packages. Develops a viable space for all interconnects including 2D and 3D models extracts of electrical structures for the entire dietodie interconnect. Defines signal integrity rules, reviews implementation, documents characterization and measurement reports, and improves and optimizes design margins. Applies knowledge of signal integrity design and tradeoffs to perform simulations of interconnect and guide package and platform physical implementation, and designs and characterizes test structures to correlate simulations and measurements for interconnects using intricate highspeed equipment and debugs challenges. Develops electrical specifications and new industry standard interconnect specifications to guide consortiums for nextgeneration interfaces. Documents and provides implementation guidelines to the end customers as part of the platform design guide. Collaborates with IP design teams and silicon integration teams to ensure the IP and SoC designs maximize the platform level solution space to meet targeted product landing zone requirements and minimize quality degradation (e.g., attenuation, crosstalk, jitter, power noise) and cost.

Qualifications:
Minimum Qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 8+ years of experience with a Bachelor's degree, 6+ years with a Master's degree, or 4 years with a PhD.
  • Proficiency in signal integrity analysis, including simulations and validation techniques.
  • Hands-on experience with 3D EM solvers and 3D modeling tools.
  • Strong understanding of PCB and package design principles.
  • Expertise in electrical validation and debug practices.
  • Technical proficiency in noise glitch and signal/power integrity analysis.
Preferred Qualifications:
  • Advanced knowledge of systems engineering fundamentals related to signal delivery design and evaluation.
  • Familiarity with DDR and SERDES interfaces, such as LPDDR5x/6, GDDR6/7, PCIe Gen5/6/7, PAM-4 SerDes, UCIe, UAL, I3C, SVID, etc.
  • Experience developing electrical interface specifications and collaborating with industry consortiums.
  • Ability to demonstrate strong problem-solving skills and strategic thinking in design optimization.
  • Proven ability to work collaboratively across multidisciplinary teams.

We are looking for passionate individuals eager to make an impact and drive innovation.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

* Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION:

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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