Senior Verification Engineer / Lead Verification Engineer

Nutanix; Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Benefits offered by this job

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Job summary

Qualcomm India Private Limited seeks a Senior Verification Engineer/Lead with 7+ years in ASIC/SoC verification. You will drive verification across simulation, emulation, and FPGA prototyping, using SystemVerilog/UVM, RTL concepts, and regression strategies.

Responsibilities include designing verification plans, building reusable environments, and mentoring engineers while collaborating with design, firmware, and software teams to ensure project quality and timely delivery.

Qualifications

• 7+ years of ASIC, SoC, or IP verification experience.
• Strong SystemVerilog/UVM and RTL design knowledge.
• Experience with emulation, FPGA-based validation, and pre-silicon bring-up.

Responsibilities

• Develop and execute verification plans for IP, subsystem, and SoC designs.
• Build reusable verification environments with SystemVerilog, UVM, and coverage models.
• Drive functional verification, regression, debug and coverage closure.
• Debug RTL/testbench/system issues across sim, emulation and FPGA platforms.
• Support software-driven validation and system-level verification; mentor juniors.

Skills

SystemVerilog/UVM

RTL design understanding

C/C++

Python

Verilog

Education

Bachelor's or Master's in Electrical/ Electronics/ Computer Engineering

Tools

Emulation platforms (Siemens Veloce/Cadence Zebu)

Xilinx FPGA prototyping (Vivado)

CI/CD & regression tooling

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

We are seeking a Senior Verification Engineer / Lead Verification Engineer with 7+ years of experience in ASIC/SoC verification to drive verification and validation of complex IPs and SoCs across simulation, emulation, and FPGA prototyping environments. The ideal candidate will possess strong expertise in SystemVerilog/UVM, a solid understanding of RTL design, and hands-on experience with emulation and FPGA-based validation platforms.

Key Responsibilities

• Develop and execute verification plans for IP, subsystem, and SoC-level designs.


• Build reusable verification environments using SystemVerilog, UVM, assertions, scoreboards, and coverage models.


• Drive functional verification, regression execution, debug, and coverage closure.


• Debug RTL, testbench, and system-level issues across simulation, emulation, and FPGA platforms.


• Support software-driven validation, pre-silicon bring-up, and system-level verification.


• Enable and support emulation and FPGA prototyping environments.


• Collaborate with design, architecture, firmware, and software teams to ensure product quality and schedule execution.


• Drive automation, verification methodology improvements, and mentoring junior engineers.

Required Qualifications

• Bachelor's or master's degree in electrical/Electronics/Computer Engineering or related field.


• 7+ years of ASIC, SoC, or IP verification experience.

Technical Skills

• Strong expertise in SystemVerilog, UVM, SVA, constrained-random verification, functional coverage, and verification closure methodologies.


• Good understanding of Verilog RTL design, ASIC/SoC flows, CDC, reset verification, and low-power concepts.


• Strong programming and scripting skills in C/C++, Python, and Tcl/Perl/Shell.


• Experience with Git, regression automation, and CI/CD workflows.

Emulation & FPGA Prototyping

• Hands-on experience with Siemens Veloce/Veloce TBX, Cadence Zebu, Palladium, or equivalent emulation platforms.


• Familiarity with SCE-MI, DPI-C, transaction-based acceleration, hybrid verification flows, software-driven validation, and co-emulation methodologies.


• Experience with Xilinx FPGA prototyping and validation flows, including familiarity with AMD/Xilinx UltraScale+ and Versal architectures and Vivado tools.

Protocol Knowledge

• Experience verifying and debugging one or more industry-standard protocols including LPDDR5/LPDDR5X/LPDDR6, PCIe, Ethernet, USB, UART, I2C/I3C, MIPI C-PHY/D-PHY, AXI, AHB, and APB.

Preferred Qualifications

• Experience with large-scale SoC verification, emulation, and FPGA prototyping.


• Familiarity with AI-assisted verification and design methodologies.


• Experience with software bring-up, system-level validation, and post-silicon debug.


• Exposure to automation frameworks and AI/Generative AI-based verification productivity tools.

Soft Skills

• Strong analytical and problem-solving skills with the ability to debug complex system issues.


• Excellent communication and collaboration skills in a cross-functional environment.


• Self-motivated, proactive, and capable of working independently with minimal supervision.


• Ability to lead technical discussions, influence decisions, and mentor engineers.


• Strong ownership, accountability, and commitment to quality and execution.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.


• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.


• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

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