Senior Validation Engineer

Wipro; Bengaluru; On-site; INR 1,400,000 - 2,200,000; Full time

Job summary

Wipro is seeking an experienced hardware validation engineer in Bengaluru to lead end-to-end validation of PCIe, Ethernet, USB and HSIO IPs. The role focuses on functional, stress, and interoperability testing, with analysis of protocol captures and logs to drive root-cause fixes.

Collaboration with Design, Firmware, BIOS, Driver, and Architecture teams is essential, along with mentoring junior engineers. You will automate validation pipelines using Python, improve test coverage, and contribute

Qualifications

• Hands-on expertise validating Ethernet, USB, and HSIO IPs.
• Experience with post-silicon validation and platform bring-up.
• Proficient in protocol captures, SI measurements and logs.
• Ability to automate tests using Python-based frameworks.
• Familiar with industry standards for compliance testing.

Responsibilities

• Develop and execute validation plans for PCIe, Ethernet, USB, and HSIO IPs.
• Perform functional, stress, performance, compliance, and interoperability testing.
• Analyze protocol captures, SI measurements, and hardware logs to identify root causes.
• Validate power management features, error handling, and recovery mechanisms.
• Collaborate with Design, Firmware, BIOS, Driver, and Architecture teams to resolve issues.
• Automate validation workflows and improve test coverage using Python-based frameworks.
• Mentor junior engineers and provide technical leadership for validation activities.

Skills

Ethernet validation

USB validation

HSIO/SerDes

Post-silicon validation

Protocol analyzers

Test equipment

Debug across layers

Python scripting

Test automation

Compliance testing

CXL/NVMe/DPDK

Server architecture

x86 platforms

Tools

Oscilloscopes

BERTs

Protocol Analyzers

Logic Analyzers

Traffic Generators

Network Test Equipment

Job description

• Hands-on expertise in Ethernet validation (1G/10G/25G/50G/100G+), link bring-up, throughput, latency, packet integrity, and interoperability testing.
• Experience in USB 3.x/USB4 validation, Type-C, Power Delivery (PD), compliance, functional, and stress testing.
• Strong understanding of HSIO/SerDes architecture, signal integrity, equalization, jitter, eye-diagram analysis, and lane margining.
• Experience in post-silicon validation, platform bring-up, and hardware-software integration testing.
• Knowledge of PCIe, Ethernet, and USB protocol analyzers and debug methodologies.
• Hands-on experience with Oscilloscopes, BERTs, Protocol Analyzers, Logic Analyzers, Traffic Generators, and Network Test Equipment.
• Experience debugging issues across Silicon, BIOS/UEFI, Firmware, Driver, and Linux/Windows OS layers.
• Proficiency in Python, Shell scripting, and test automation frameworks.
• Experience with compliance and interoperability testing using industry standards and certification tools.
• Familiarity with CXL, NVMe, RDMA, DPDK, SR-IOV, and virtualization technologies.
• Strong understanding of server architecture, x86 platforms, and data center technologies.

Key Responsibilities

• Develop and execute validation plans for PCIe, Ethernet, USB, and HSIO IPs.
• Perform functional, stress, performance, compliance, and interoperability testing.
• Analyze protocol captures, SI measurements, and hardware logs to identify root causes.
• Validate power management features, error handling, and recovery mechanisms.
• Collaborate with Design, Firmware, BIOS, Driver, and Architecture teams to resolve issues.
• Automate validation workflows and improve test coverage using Python-based frameworks.
• Mentor junior engineers and provide technical leadership for validation activities.