Senior Silicon Validation Engineer

Arrow Electronics India Pvt Ltd; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Arrow Electronics India Pvt Ltd in Bengaluru is seeking a Senior Level Engineer for pre/post-silicon validation and hardware debugging on complex SoCs, MCUs, and ASICs. You will perform board bring-up, power/clock/strap checks, and root-cause analysis across multiple interfaces with lab validation using advanced test equipment.

You will collaborate with RTL/design, firmware, architecture, and system teams to resolve issues and ensure hardware reliability.

Qualifications

• Silicon bring-up and board-level debugging experience.
• Experience validating interfaces: PCIe, Ethernet, CAN/CAN FD, LIN, FlexRay, UART, I2C, SPI.
• Ability to read schematics and perform pin-level signal tracing.
• Strong root-cause analysis and problem-solving skills.

Responsibilities

• Perform pre & post-silicon functional validation for SoCs, MCUs, and ASICs.
• Board bring-up covering power, reset, clock, straps, fuses, hardware init and JTAG.
• Hardware debug and failure analysis across boot, hangs, memory issues, and data integrity.
• Validate interfaces like PCIe, Ethernet, CAN/CAN FD, LIN, UART, I2C, SPI.
• Lab validation using oscilloscopes, logic analyzers, protocol analyzers, and JTAG.
• Collaborate with RTL/design, firmware, architecture, and system teams to drive root causes to closure.

Skills

Silicon bring-up

Board debugging

Protocol validation

Hardware failure analysis

Lab validation

SoC/ASIC bring-up

Power/Reset/Clock

JTAG debugging

Signal integrity

Education

B.E./B.Tech

M.E./M.Tech

Electronics

Electrical Engineering

Embedded Systems

Computer Engineering

Tools

Oscilloscopes

Logic analyzers

Protocol analyzers

Bus sniffers

JTAG

Job description

Principal Accountabilities

• Perform pre & post-silicon functional validation activities for complex SoCs, MCUs, and ASICs.
• Perform board bring-up covering power, reset, clock, straps, fuses, hardware initialization, and JTAG debug.
• Perform hardware debug and failure analysis by performing root cause investigations of boot failures, system hangs, data corruption, memory access issues, and intermittent hardware failures.
• Validate and debug interfaces such as PCIe, Ethernet, CAN/CAN FD, LIN, FlexRay, UART, I2C, and SPI.
• Perform Lab Validation & debugging using oscilloscopes, logic analyzers, protocol analyzers, bus sniffers, and JTAG.
• Validate SRAM/Flash and debug memory initialization, access, and data integrity issues.
• Read schematics and perform pin-level signal tracing to isolate hardware issues.
• Work with RTL/design, firmware, architecture, and system teams to identify root causes and drive issues to closure.

Job Complexity

• technical execution of silicon validation and hardware debug activities.
• Perform silicon bring-up, validation, failure analysis, and debug methodologies.
• Coordinate with cross-functional teams to resolve complex silicon and system-level issues.

Skills

• Strong hands-on expertise in silicon bring-up, board-level debugging, protocol validation, hardware failure analysis, and lab-based validation on real silicon platforms.
• Strong experience with SoC, MCU, or ASIC bring-up and functional validation.
• Hands-on experience with power, reset, clocking, straps, configuration errors.
• Experience debugging PCIe, Ethernet, CAN/CAN FD, LIN, FlexRay, UART, I2C, or SPI interfaces.
• Strong understanding of SRAM/Flash, register-level configuration, signal integrity, and hardware failure analysis.
• Proficiency with oscilloscopes, logic analyzers, protocol analyzers, and other hardware debug equipment.
• Ability to read schematics and perform pin-level signal tracing.
• Strong root-cause analysis and problem-solving skills.

Education

B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, Embedded Systems, Computer Engineering, or related field.

Location

IN-KA-Bangalore, India (eInfochips)

Time Type

Full time

Job Category

Engineering Services

Experience Level

Senior Level