Senior RTL / IP Design Engineer

AMD; Hyderabad; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

AMD is seeking a Sr. Silicon Design Engineer to join the Silicon IP solutions & SOC group. You will contribute to architecture-to-Productization, work across cross-functional teams, and drive high-quality IP development from design through tapeout.

The role requires strong RTL design, verification, and collaboration skills, with experience in PCIe, NVMe, Ethernet, TCP/IP, and RDMA IPs. Excellent communication and leadership abilities are essential.

Qualifications

• Minimum 5 years of relevant experience.
• Experience in Silicon IP development processes and methodologies.
• Experience with Verilog RTL design and VCS simulations.
• Proven track record in complex silicon tapeouts.
• Knowledge of PCIe, NVMe, Ethernet, TCP/IP, RDMA IPs.

Responsibilities

• Define u-architecture from the architecture definition.
• Execute design and development plans for IPs.
• RTL design, IP integration & documentation.
• Lead technical reviews for u-architecture and implementation.
• Develop testing plans including Compliance and Interop testing.
• Review Design Implementations and Verification plans.

Skills

Verilog RTL design

VCS simulation tool

Perl/Shell scripting

IP architecture

IP verification

cross-functional collaboration

Education

Bachelor of Science in Electrical Engineering or Computer Science

Tools

VCS

IP integration

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

THE ROLE:

This exciting position in AMD’s Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical skills across the design hierarchy from architecture to Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments

As a Sr. Silicon Design Engineer, you will work as part of a team responsible for product development with high level of quality. You are expected to participate in many aspects of a technical project including: thorough understanding and generation of IP u-Architecture development for individual IPs or IP subsystems, work with cross-functional IP teams from front-end development through Productization & ASICization.

This position requires an individual to be creative, team-oriented, technology savvy, able to work with large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution

THE PERSON:

You have a passion for modern, complex hardware and IP architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

A major part of your responsibility will be to participate in and take a lead technical role in most of the phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation and support including:

• Define u-architecture from the architecture definition
• Executing design and development plans for IPs
• RTL design, IP Integration & documentation
• Participating in and acting as a senior technical reviewer for various u-architecture and implementation reviews within the development organization
• Working with stakeholders to develop comprehensive testing plans including Compliance and Interop testing
• Critically Review and provide feedback on the Design Implementations and Verification plans

PREFERRED EXPERIENCE:

• A minimum of 5 years of relevant experience is required.
• Proven experience in Silicon IP development process, methodologies, DesignforTest methodologies
• Experience with Verilog RTL design, VCS simulation tool, Perl/Shell scripting
• Proven experience in contributing to complex silicon tapeouts
• Detailed understanding and proven track record of developing any of the leading edge PCIe, Full featured DMAs, NVMe based Storage IP, networking IP solutions such as Ethernet, TCP/IP, RDMA IPs.
• Strong oral and written communication skills are essential
• The ideal candidate will be a proactive contributor to the RTL design methodologies
• Ability to work on complex issues where analysis situations or data requires an in-depth evaluation of variable factors.
• To be successful, this individual must demonstrate favorable results through leadership and influencing multiple individuals and groups.

ACADEMIC CREDENTIALS:

• A Bachelor of Science Degree in Electrical Engineering or Computer Science, a master’s degree or equivalent experience is required.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.