Senior RTL design engineer

Micron Technology, Inc; Hyderabad; On-site; INR 2,400,000 - 3,800,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Job summary

Micron Technology, Inc in Hyderabad, India seeks a Senior RTL design engineer to design digital IP blocks from microarchitecture to RTL, and to drive full-chip integration with CDC, lint, synthesis, STA and power analysis. You will collaborate with CAD, EDA, and software teams to embed AI-driven flows into verification and design sign-off environments.

The role requires a Master’s degree in electrical or computer engineering and 3–6 years of RTL design experience, with strong knowledge of ACMOS

Qualifications

• Master’s degree in electrical or computer engineering with 3–6 years of RTL design experience.
• Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies.
• Deep understanding of SoC design flows (Lint, CDC, synthesis, STA, power analysis).
• Fundamentals in CMOS circuit design, device physics and memory operation.
• Ability to work effectively with global multi-functional teams.

Responsibilities

• Design digital IP blocks from microarchitecture to RTL creation and integration.
• Define and review module interfaces and system-level architecture.
• Demonstrate AI-based tools and automation to accelerate RTL design optimization and verification.
• Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis.
• Collaborate with CAD, EDA, and software teams to integrate AI-driven flows into workflows.
• Provide technical mentorship and participate in design reviews.

Skills

RTL design

Asynchronous design

Synchronous design

CDC methodologies

SoC design flows

CMOS circuit design

Global collaboration

Education

Master’s degree in electrical or computer engineering

Job description

Req. ID:

JR105670 Senior RTL design engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Job Description

Key Responsibilities

• Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development.
• Define and review module interfaces and system-level architecture.
• Actively demonstrate AI‑based tools, agentic workflows, and automation frameworks to:
  • Accelerate RTL design optimization and design‑space exploration
  • Assist in testbench generation and corner coverage
  • Improve debug efficiency across simulation and silicon learning loops
• Define semicustom methodology for memory design.
• Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis.
• Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments.
• Collaborate closely with architecture, design, verification, and physical design / layout teams.
• Oversee and manage the layout process including floor-planning, placement, and routing.
• Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools.
• Contribute to cross-group communication to work towards standardization and group success
• Provide technical mentorship and participate in design and methodology reviews.
• Drive innovation into the future memory generations and design methodology within a dynamic work environment

Minimum Qualifications

• Master’s degree in electrical or computer engineering with 3 - 6 years of experience in RTL design.
• Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies.
• Deep understanding of SoC design flows (Lint, CDC, synthesis, STA, power analysis)
• Fundamentals in CMOS circuit design, device physics and memory operation.
• Ability to work effectively with global multi-functional teams.

Preferred Qualifications

• Domain knowledge in DRAM design (DDR5, LPDDR5 or HBM or in any other memory related field)
• Exposure to or strong interest in AI/ML-assisted design flows, agentic AI or advanced automation in digital design and verification.
• Experience working with Spyglass.
• Domain knowledge in NAND memory design.
• Experience on SoC / ASIC semicustom flow.
• Strong communication, problem-solving and collaboration skills.

Job Profile(s):

Semiconductor Design Engineer 3

Relocation level: (TBD)

Before Getting Started

• Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.
• If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.