Senior Logic Design Engineer

International Business Machines Corporation; Bengaluru; Sur place; INR 3 500 000 - 7 500 000; Plein temps

Résumé du poste

IBM in Bengaluru, India seeks an experienced CPU micro-architect to lead the Instruction Sequencing Unit development for high-performance processors. You will drive architecture discussions, estimate effort, and collaborate across verification, design, and software teams to deliver feature-rich CPU blocks.

The role requires 8–15+ years in micro-architecting and designing dispatch units, with expertise in Out-of-Order, superscalar cores and ISA.

Qualifications

• 8-15+ years of micro-architecting and CPU design experience.
• Experience with Issue Queues, Register renaming and forwarding, ROB and pipeline handling.
• Deep expertise in Out of Order, Superscalar, SMT core architecture and ISA.
• High-frequency, instruction-pipeline design experience.
• Processor Core silicon bring-up experience.
• Understanding of x86/ARM/RISC-V processor designs.
• Proficiency with RTL design using Verilog or VHDL.

Responsabilités

• Lead micro-architecture, design and development of Instruction Sequencing Unit for high-performance CPU.
• Micro-architect and design Instruction Dispatch to Issue queues and ROB.
• Develop features and present architecture in high level design discussions.
• Estimate effort and silicon area/wire usage for features.
• Collaborate with Core units, Verification, DFT, Physical Design, Timing, FW/SW teams.

Connaissances

Micro-architecture

Instruction Dispatch

Register Renaming

Out of Order Execution

RTL Design

Formation

Master's Degree

Outils

Verilog

VHDL

Description du poste

Introduction

At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You’ll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress.

Introduction

At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You’ll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress.

Your Role And Responsibilities

• Lead the micro-architecture, design and development of Instruction Sequencing Unit for high-performance Processor CPU of IBM Systems.
• Micro-Architect and design Instruction Dispatch to Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of a high performance processor CPU
• Develop the features, present the proposed architecture in the High level design discussions
• Estimate the overall effort to develop the feature.
• Estimate silicon area and wire usage for the feature.
• Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature
• Signoff the Pre-silicon Design that meets all the functional, area and timing goals
• Participate in post silicon lab bring-up and validation of the hardware
• Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums.

Preferred Education

Master's Degree

Required Technical And Professional Expertise

• 8-15 or more years of demonstrated experience in micro-architecting and designing Instruction Dispatch unit of CPU
• Hands of experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling
• Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA
• Experience with high frequency, instruction pipeline designs
• At least 1 generation of Processor Core silicon bring up experience
• In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
• Proficiency of RTL design with Verilog or VHDL

Preferred Technical And Professional Experience

• Knowledge of Instruction Decode, Memory and Execution units
• Knowledge of verification principles and coverage
• High-level knowledge of Linux operating system
• Knowledge of one object oriented language and scripting language
• Understanding of Agile development processes
• Experience with DevOps design methodologies and tools
• Advanced Static Timing: Deep understanding of static timing and its application in chip logic development can be advantageous in driving business results.
• Front-end Processing Expertise: Familiarity with front-end processing and its role in chip logic development can be valuable in shaping the future of cognitive systems logic design.
• Post-Si debug: Familiarity with Post-Si debugs is preferable.
• Performance & Power Analysis: Familiarity with analysing Performance & Power Tools data and coming up with features solving PPA issues.