Senior Lead STA Engineer

Qualcomm; Dadri; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Qualcomm India Private Limited is seeking an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP development for high-performance, low-power products. You will collaborate with cross-functional teams to determine the product execution path and drive timing closure.

The role emphasizes hands-on design and verification across advanced nodes, ECO handling, power minimization strategies, and a commitment to quality in a fast-paced

Qualifications

• Bachelor’s degree with 3+ years ASIC experience OR Master’s with 2+ years OR PhD with 1+ year ASIC experience.
• Experience in static timing analysis, constraints and physical implementation basics look-for.
• Familiarity with industry STD EDA tools and ECO preparation for timing convergence.

Skills

STA & timing optimization

Power optimization

Perl

TCL

Education

Bachelor’s degree in Science/Engineering or related field

Master’s degree in Science/Engineering or related field

PhD in Science/Engineering or related field

Tools

PT

Tempus

GENUS

Innovus

ICC

Job description

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

Desired Experience

• 5+ years of experience in static timing analysis, constraints and other physical implementation aspects.
• Solid understanding industry standard tools PT, Tempus, GENUS, Innovus, ICC etc.
• Solid grip on STA fixing aspects to solve extreme critical timing bottleneck paths.
• Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs.
• Should be aware about the tricks for minimizing power.
• Experience in deep submicron process technology nodes is strongly preferred.
• Knowledge of high performance and low power implementation methods is preferred.
• Willing to push PPA to the best possible extent.
• Strong fundamentals.
• Expertise in Perl, TCL language

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.