STA Engineer

Qualcomm; Hyderabad; On-site; INR 3,000,000 - 5,500,000; Full time

Job summary

Qualcomm India Private Limited seeks a seasoned Hardware Engineer to plan, design, verify, and test complex electronic systems for ASIC/SoC projects. You will optimize power, performance, and area while bringing up yields and constraints for digital/analog/DSP/FPGA domains.

The role requires hands-on experience with Place & Route, STA tools, UPF/CPF power domains, and formal verification, plus strong coding skills in Verilog, C++, Python, and Perl/Tcl.

Qualifications

• Bachelor's degree in CS/EE or related field with 6+ years hardware engineering experience.
• Master's degree in CS/EE or related field with 5+ years hardware experience.
• PhD with 4+ years hardware experience.
• Extensive experience in Place & Route with FC or Innovus is required.
• Complete ASIC flow with low power, performance and area optimization techniques.
• Experience with STA using Primetime and/or Tempus is required.
• Proficient in constraint generation and validation.
• Experience with multiple power domain implementation with complex UPF/CPF definitions.
• Formal verification experience (Formality/Conformal).
• Perl/Tcl, Python, C++ skills are needed.
• Strong problem solving and ASIC development/debugging skills.
• Exposure to Constraint management tool and Verilog coding experience.

Responsibilities

• Plan, design, verify, and test electronic systems for ASIC/SoC projects.
• Collaborate with cross-functional teams to meet performance requirements.
• Develop and validate power, timing, and area optimizations.
• Perform bring-up, yield improvement, and debugging across digital/analog/FPGA domains.
• Work on high-speed CPU implementations and clock tree design.

Skills

Strong problem solving

Verilog coding

C++

Python

Perl/Tcl

Education

Bachelor's in Computer Science / Electrical/Electronics / Engineering

Master's in Computer Science / Electrical/Electronics / Engineering

PhD in Computer Science / Electrical/Electronics / Engineering

Tools

Place & Route (FC/Innovus)

STA (Primetime/Tempus)

ASIC flow optimization (low power/area/performance)

Power domain definitions (UPF/CPF)

Formal verification (Formality/Conformal)

Clock Tree Implementation Techniques

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

• Extensive experience in Place & Route with FC or Innovus is an absolute must
• Complete ASIC flow with low power, performance and area optimization techniques
• Experience with STA using Primetime and/or Tempus is required
• Proficient in constraint generation and validation
• Experience of multiple power domain implementation with complex UPF/CPF definition required
• Formal verification experience (Formality/Conformal)
• Perl/Tcl, Python, C++ skills are needed
• Strong problem solving and ASIC development/debugging skills
• Experience with CPU micro-architecture and their critical path
• Low power implementation techniques experience
• High speed CPU implementation
• Clock Tree Implementation Techniques for High Speed Design Implementation are required
• Exposure to Constraint management tool and Verilog coding experience
• Master's degree in Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.