Senior FPGA IP Design Engineer

Altera; Bengaluru; On-site; INR 3,200,000 - 4,800,000; Full time

Job summary

Altera in Bengaluru, India seeks a Senior FPGA Soft IP Development Engineer to own architecture, RTL design, and parameterizable IP blocks for high-performance FPGA platforms.

You will drive AMBA AXI interconnect IP porting, scalability, and timing closure while collaborating with verification and physical design teams across multiple FPGA architectures.

Qualifications

• 5+ years RTL/FPGA design experience.
• Deep, hands‑on knowledge of the AMBA AXI4 protocol suite and high‑speed memory interfaces.
• Proficiency with FPGA implementation tools and EDA simulation software (Questa/Modelsim, VCS).
• Strong scripting skills in Python, Tcl, or Perl for build/test automation.

Responsibilities

• Own micro-architecture definition and RTL design for critical blocks (schedulers, pipelines, coherency/ordering logic, system interfaces).
• Collaborate with verification to shape test plans and improve coverage.
• Coordinate with physical design to resolve timing, power, and congestion challenges.
• Provide RTL fixes during regression debugging and root-cause analysis.
• Support FAE for pre-sales engagements and AE for post-sales deliveries.
• Apply CDC/RDC analysis within the design flow.
• Develop RTL micro-architecture from scratch and mentor peers as needed.

Skills

AMBA AXI4 knowledge

Python scripting

Tcl scripting

Perl scripting

Education

Bachelors or Masters in Electrical/Computer Engineering

Tools

Questa/Modelsim

Synopsys VCS

FPGA toolchain

Job description

Job Details: Job Description: We are seeking a Senior FPGA Soft IP Development Engineer to own the architecture, micro-architecture, and parameterizable RTL design of high-performance soft intellectual property (IP) blocks. In this role, you will be responsible for developing critical system-level IP cores—including advanced AMBA AXI Interconnect IP - ensuring their portability, scalability, and timing closure across diverse FPGA architectures.

Responsibilities

• Own micro-architecture definition and RTL design for critical blocks such as schedulers, command pipelines, coherency/ordering logic, and system interfaces
• Collaborate closely with the verification team to shape test plans and improve verification coverage
• Work with the physical design team to understand and resolve timing, power, and congestion challenges
• Work with the verification team on regression failure debug and root cause, and provide RTL fixes if necessary
• Provide technical support to the FAE team on pre-sales customer engagements
• Provide technical support to the AE team on post-sales customer deliveries
• Apply working knowledge of CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analysis within the design flow
• Develop RTL micro-architecture from scratch
• Provide technical guidance and mentorship to other engineers while remaining a hands‑on individual contributor

Required Qualifications & Technical Skills

• Education & Experience: bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5+ years of dedicated RTL/FPGA design experience.
• Protocol Expertise: Deep, hands‑on knowledge of the AMBA AXI4 protocol suite and high-speed memory interfaces.
• Toolchains: Proficiency with FPGA implementation tools and EDA simulation software (Siemens Questa/Modelsim, Synopsys VCS).
• Scripting: Strong scripting skills in Python, Tcl, or Perl for build automation and test automation.

Job Type: Regular Shift: Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

About Altera

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.