Senior FPGA Engineer

Dhruva Space GmbH; Hyderabad; On-site; INR 1,300,000 - 2,100,000; Full time

Job summary

Dhruva Space GmbH in Hyderabad seeks an experienced Senior FPGA Engineer to lead FPGA architectures, DSP algorithms, and RFSoC-based designs. You will work with cross‑functional teams to deliver high‑performance signal processing solutions.

The ideal candidate has 5–7 years in FPGA design, hands‑on experience with VHDL, Vivado, and RF interfaces, and a collaborative mindset for system integration and verification.

Qualifications

• 5–7 years in FPGA design and development.
• Experience with FPGA timing analysis and debugging.
• Experience with RFSoC platforms and RF transceivers.
• Familiarity with HDLs (VHDL) and FPGA interfaces such as AXI, DDR, Ethernet.
• Proficiency in MATLAB, Python, TCL for DSP and data processing.

Responsibilities

• Design, develop, and optimize FPGA architectures using VHDL.
• Implement RFSoC-based FPGA designs using AMD Vivado and Vitis.
• Develop and optimize DSP algorithms for FPGA implementations.
• Conduct functional simulations and timing analysis to ensure closure.
• Debug with Chipscope, ILA, and SignalTap.
• Interface FPGA designs with ADC/DAC, RF transceivers, DDR, Ethernet.
• Collaborate with firmware, software, and hardware teams for integration.
• Develop test benches and simulations for verification.
• Optimize resource utilization and performance for high-speed data processing.
• Lead FPGA development efforts and manage team deliverables.

Skills

FPGA design

DSP

VHDL

RFSoC

Debugging

System integration

MATLAB

Python

TCL

AXI

DDR

Ethernet

UART

SPI

Timing analysis

Logic troubleshooting

RF architecture

FPGA acceleration

Education

Bachelor's/Master's in Electronics/Electrical/Computer Engineering

Tools

Chipscope

ILA

SignalTap

Vivado

Vitis

Job description

We want to create exceptional small satellite systems to help Space exploration technology meet human imagination and innovation. Join our crew!

Dhruva Space is seeking an experienced Senior FPGA Engineer to lead the design, development, and optimization of FPGA-based signal processing solutions. This role requires expertise in FPGA architectures, digital signal processing (DSP), and system integration. The ideal candidate will have strong debugging skills, hands‑on experience with RFSoC platforms, and a collaborative mindset to work with cross‑functional teams.

Key responsibilities

• Design, develop, and optimize FPGA architectures using VHDL.
• Implement and verify RFSoC-based FPGA designs using AMD Vivado and Vitis.
• Develop and optimize digital signal processing (DSP) algorithms for FPGA implementations.
• Conduct functional simulations, verification, and detailed timing analysis to ensure FPGA timing closure.
• Perform FPGA debugging and troubleshooting using hardware tools such as Chipscope, ILA, and SignalTap.
• Interface FPGA designs with external hardware components, including ADC/DAC, RF transceivers, DDR, Ethernet, and other FPGA interfaces.
• Collaborate with firmware, software, and hardware teams for seamless system integration.
• Develop test benches and perform simulations for verification of FPGA modules.
• Optimize resource utilization and improve FPGA performance for high-speed data processing applications.
• Lead FPGA development efforts and manage team deliverables.

Candidate requirements

• Bachelor’s/Master’s in Electronics, Electrical, or Computer Engineering.
• 5–7 years in FPGA design & development.
• Filtering, Modulation/Demodulation, FFT, Adaptive Filtering.
• AXI, DDR, Ethernet, UART, SPI.
• FPGA timing analysis, logic troubleshooting.
• RF architecture, FPGA acceleration techniques.
• MATLAB, Python, TCL, high-speed data processing, embedded system integration.