Senior Engineer - ASIC Backend

Ericsson; Bengaluru; On-site; INR 1,500,000 - 2,500,000; Full time

Job summary

A leading telecommunications company in Bengaluru seeks an experienced ASIC Backend Developer to contribute to the final stages of chip design for 5G networks. You will assist in backend development, timing analysis, and EDA tool usage. Candidates should have over 8 years of experience in backend development and proficiency with Synopsys tools, scripting languages, and low-power design techniques. This role emphasizes collaboration and quality in a fast-paced environment.

Qualifications

• 8+ years of experience in backend development, specializing in ASIC design.
• Hands-on experience with EDA tools and successful ASIC tape-outs.
• Knowledge of low-power design techniques and scripting for automation.

Responsibilities

• Assist in backend development tasks such as synthesis and timing analysis.
• Support static timing analysis and timing sign-off activities.
• Collaborate with cross-functional teams to ensure smooth execution.

Skills

Backend development

Synthesis

Static timing analysis

Power optimization

EDA tools (Synopsys)

Scripting languages (Python, TCL)

UNIX/Linux

Low-power design techniques

Communication skills

Tools

Synopsys Design Compiler

PrimeTime

Fusion Compiler

Linux Shell

Job description

About this Opportunity

Join Ericsson’s cutting‑edge journey to shape the future of 5G networks! As an ASIC Backend Developer, you’ll work on pioneering digital ASIC designs vital to Ericsson’s mobile network infrastructure. Our team is responsible for the final critical stage of chip design before fabrication, thriving on Lean and Agile principles, promoting close collaboration and continuous improvement.

What you will do

• Assist in backend development tasks, including synthesis, constraints setup, equivalence checking, and place-and-route under guidance, contributing to the delivery of high‑quality digital ASICs.
• Support the static timing analysis, timing sign‑off activities, and help with optimizing timing/area/power using Synopsys tools (Design Compiler, PrimeTime, ICC2/FC) with mentorship.
• Gain hands‑on experience with EDA tools and help develop scripts (Python, TCL, Linux Shell) to automate processes and improve project efficiency.
• Learn and contribute to innovations in low‑power design using UPF and assist in providing input on physical implementation and floor‑planning.
• Work collaboratively with cross‑functional teams in a supportive, knowledge‑sharing environment, ensuring smooth integration and execution.

The skills you bring

• 8+ years of experience in backend development, with growing specialization in synthesis, static timing analysis (STA), and power optimization within semiconductor design.
• Contributed to multiple successful ASIC tape‑outs, gaining hands‑on exposure to the full development cycle.
• Hands‑on knowledge and proficiency in EDA tools (Synopsys Design Compiler, Fusion Compiler, PrimeTime, ICC2/Innovus, Formality/LEC) for timing, area, power closure on advanced technology nodes.
• Good to have experience in scripting languages (Python, Perl, TCL, and Linux Shell) to automate and streamline workflows.
• Comfortable in UNIX/Linux environments, essential for efficient and effective backend operations.
• Commitment to quality with a keen eye for detail and experience maintaining high standards in complex, high‑impact projects.
• Knowledge of low‑power design techniques, including UPF application and VHDL/System Verilog for RTL2GDS flows.
• A collaborative mindset with a strong focus on innovative solutions and continuous improvement in fast‑paced environments.
• Solid communication skills, able to explain technical topics clearly and collaborate effectively across teams.

Preferred Skills

• Good to have knowledge of Multi/Many‑Core CPU architectures.
• Proficient in Git, and Synopsys tools like Spyglass, Design Compiler, and Formality for optimised backend development.
• Familiarity with mobile communication standards, telecom, floor planning, and physical implementation to enhance ASIC design effectiveness.

Equal Opportunity

Ericsson is proud to be an Equal Opportunity Employer. Learn more.

Location: Bangalore, India