Senior Embedded Software Engineer [Robotics]
Direct message the job poster from Rx100 Ventures
Role Overview
As the Senior Embedded Software Engineer [Robotics], you will design and implement the core embedded framework — a modular runtime that dynamically orchestrates robotic subsystems (sensors, control, communication, AI, and logging) at the bare-metal level.
Take ownership of hands‑on development of the SDK kernel, peripheral driver layer, and event‑based orchestration system — enabling deterministic, distributed, and scalable robotic control without the complexity of monolithic RTOS stacks.
Key Responsibilities
- Design a lightweight embedded runtime that enables real‑time scheduling, inter‑module communication, and asynchronous events.
- Build bare‑metal peripheral drivers (Ethernet, SPI, I2C, UART, QSPI, CAN, MDMA, ADC/DAC, Timers).
- Build bare‑metal Ethernet and LwIP‑compatible drivers for high‑throughput, low‑latency data transfer.
- Develop CMSIS‑level MCU abstraction layers supporting multiple MCU families.
- Support and guide the team in implementing high‑quality embedded software architectures, frameworks, and system‑level components.
- Optimize DMA/MDMA multi‑channel controllers and memory‑mapped I/O pipelines for minimal latency and deterministic performance.
- Develop and optimize bare‑metal Ethernet, LwIP, UART, CAN, SPI, and I2C drivers, focusing on throughput and latency.
- Work with QSPI Flash, MDMA‑based TX/RX, SDMMC, NOR/NAND interfaces, including driver bring‑up and timing tuning.
- Ensure real‑time synchronization via Timer/PWM control, high‑precision timebases, and event timestamping.
- Apply interrupt models, cache coherency, memory alignment, latency profiling, and zero‑copy data handling across modules.
- Design CMSIS‑compliant peripheral frameworks, modular driver abstraction, and scalable SDK components.
Experience
ARM memory architecture, cache hierarchy, and bus‑level data flow knowledge is essential. Proficiency in optimizing DMA/MDMA multi‑channel controllers and memory‑mapped I/O pipelines for minimal latency and deterministic performance is required. Experience with bare‑metal Ethernet, LwIP, UART, CAN, SPI, and I2C driver development, with the ability to optimize for throughput and latency, is mandatory. Hands‑on work with QSPI Flash, MDMA‑based TX/RX, SDMMC, and NOR/NAND interfaces, including driver bring‑up and timing tuning, is necessary. Deep understanding of Timer/PWM control, high‑precision timebases, and event timestamping for real‑time synchronization is required. Expertise in interrupt models, cache coherency, memory alignment, latency profiling, and zero‑copy data handling across modules is essential. Proficiency with ARM‑GCC, Makefiles, VSCode, GDB, and hardware debugging using logic analyzer/oscilloscope is expected.
Required Skills & Experience
- 6+ years of experience in embedded firmware design, with at least 2+ years in bare‑metal or CMSIS‑level development.
- Strong understanding of ARM Cortex‑M architecture, including memory hierarchy, bus interfaces (AHB/AXI), and cache optimization techniques.
- Proven ability to write and optimize device drivers — particularly for Ethernet, SPI, I2C, and QSPI — from register level up.
- Expertise in C/C++, hardware register programming, and low‑level MCU architecture.
- Deep knowledge of RTOS internals, while capable of building dynamic, event‑driven frameworks that operate beyond traditional RTOS constraints.
- Strong grasp of interrupt design, memory coherency, DMA pipelines, and real‑time dataflow synchronization.
- Experience with robotics systems, sensor data processing, or real‑time control loops is a strong plus.
- Familiarity with STM32 ARM‑cortexM7 series or equivalent ARM‑based MCU ecosystems.
Employment type
Full‑time
Industries
Business Consulting and Services