Senior Digital Design Engineer

NXP Semiconductors; Pune District; On-site; INR 3,000,000 - 4,500,000; Full time

Job summary

NXP Semiconductors in Pune is seeking a Synthesis & Front-End Implementation Engineer to translate RTL designs into optimized gate-level netlists, ensuring performance, power, and area targets for complex IP blocks.

You will own RTL synthesis for digital blocks, develop timing constraints, perform STA and timing closure, run formal verification (LEC), and drive front-end power and area optimizations while collaborating with RTL, DFT and physical design teams.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering or related field.
• 5+ years of digital ASIC/SoC experience focusing on synthesis & front-end implementation.
• Proficiency with industry-standard synthesis/verification tools.

Responsibilities

• Perform synthesis of RTL designs for digital blocks and sub-systems, including hierarchical synthesis.
• Develop and implement robust timing constraints (SDC) to meet target frequencies.
• Conduct STA, identify critical paths, and collaborate for timing closure.
• Execute formal verification (LEC) to ensure RTL vs. netlist equivalence.
• Analyze and optimize front-end power consumption with advanced analysis tools.
• Estimate and optimize area to meet chip size requirements.
• Collaborate with RTL, DFT, and physical design teams for seamless hand-off.
• Develop and maintain automation scripts (Tcl, Python, Perl) for flows and analysis.
• Evaluate new CAD tools and methodologies to improve efficiency.
• Document design constraints, methodologies, and results thoroughly.

Skills

Verilog/SystemVerilog

Scripting languages

Cross-functional teamwork

Communication skills

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synopsys Design Compiler

Synopsys Fusion Compiler

PrimeTime

Synopsys Formality

Cadence Conformal

DFT tooling

Job description

Job Position : Synthesis & Front-End Implementation Engineer Job Description

We are seeking a highly motivated Synthesis & Front-End Implementation Engineer to join our dynamic team. In this role, you will be crucial in translating RTL designs into optimized gate-level netlists, ensuring performance, power, and area targets are met for complex IP blocks.

Job Responsibilities

• Performing synthesis of RTL designs for various digital blocks and sub-systems, including hierarchical synthesis methodologies.
• Developing and implementing robust timing constraints (SDC) to achieve target frequencies and optimize design performance.
• Conducting STA, identifying critical paths, and collaborating with design teams for timing closure.
• Executing formal verification (LEC) to ensure functional equivalency between RTL and synthesized netlists.
• Analyzing and optimizing power consumption at the front-end stage, utilizing power analysis tools and techniques.
• Performing area estimation and optimization to meet aggressive chip size requirements.
• Collaborating closely with RTL designers, DFT engineers, and physical design engineers to ensure seamless integration and hand-off.
• Developing and maintaining automation scripts (Tcl, Python, Perl) for synthesis flows and design analysis.
• Evaluating and integrating new CAD tools and methodologies to improve efficiency and design quality.
• Documenting design constraints, methodologies, and analysis results thoroughly.

Job Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of relevant experience in digital ASIC/SoC design, with a focus on synthesis and front-end implementation.
• Proficiency with industry-standard synthesis tools (e.g., Synopsys Design Compiler, Synopsys Fusion Compiler or similar).
• Strong understanding of static timing analysis (STA) concepts and tool (e.g., Synopsys PrimeTime).
• Experience with formal verification tools (e.g., Synopsys Formality, Cadence Conformal (LEC)).
• Understanding of upf, low-power design techniques and power analysis concepts.
• Solid knowledge of Verilog/System verilog for digital design.
• Familiarity with scripting languages (Tcl, Python, Perl) for automation.
• Knowledge of DFT (Design for Testability) principles is a plus.
• Excellent problem-solving skills and attention to detail.
• Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment across multiple time zones.

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.

For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP

We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

Thank you for considering a career at NXP.

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