Sr. Principal Digital Design Engineer

NXP Semiconductors; Pune District; On-site; INR 1,500,000 - 2,500,000; Full time

Benefits offered by this job

Online and offline learning opportunities

Career development programs

Job summary

NXP Semiconductors in Pune, India is seeking a Digital Design Engineer to define and realize digital functions for ASICs development. This role involves design, verification, and evaluation of digital designs along with strong Verilog/SystemVerilog skills. The ideal candidate will have over 12 years of experience in digital design, ASIC front-end flows, and verification techniques. NXP offers robust career development opportunities including various learning platforms.

Qualifications

• 12+ years of related experience in design and verification.
• Experience in full ASIC design cycle: design, RTL coding, verification, synthesis, timing closure, DFT, backend support, and silicon bring-up.

Responsibilities

• Define and realize digital functions on IPs, subsystem or IC level.
• Design, verification, and evaluation of digital functions.
• IP delivery and silicon validation support.

Skills

Verilog/SystemVerilog coding skills

ASIC front-end design flows

C/C++ knowledge

Design verification techniques

Test bench development

UVM knowledge

System-Verilog assertions

Scripting languages (Perl, Python)

Education

BSEE or equivalent

MSEE preferred

Job description

## Responsibilities* The Digital Design Engineer is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications.* He is responsible for design, verification and evaluation of those. He is accountable for designing according to specifications, quality and reliability needs. Participation in problem solving for Digital and system domain of the device. Author of the design-specific documentation for internal and external use.* The candidate will work as a design engineer for wireless/communication ASICs development.* The main responsibilities include IP delivery and silicon validation support.* The candidate may be working full ASIC design cycle from design, RTL coding, verification, synthesis, timing closure, DFT, backend support and silicon bring-up.## RequirementsBSEE or equivalent required, MSEE is a plus, with 12+ years of related experience in following areas preferred:* Strong Verilog/SystemVerilog coding skills* Working knowledge of ASIC front-end design flows* Working knowledge of C/C++* Working experience of design verification techniques and test bench development**Strongly desired:*** Working knowledge of UVM is a desirable* Good knowledge of System-Verilog assertions, checkers and other design verification techniques are a plus* Working experience of Unified Power Format for simulation, synthesis and CLP checking is a plus* Good knowledge of scripting languages. Perl and Python are plusses## Bright Minds. Bright Futures.We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.