Senior ASIC Digital Engineer - Static Timing Analysis

SanDisk India Device Design Centre Pvt.Ltd; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

Sandisk is seeking a Senior ASIC Digital Engineer (STA, Sign Off) with 5–7 years of experience to lead timing analysis for complex IC designs in Bengaluru. The role emphasizes ownership of subsystem STA, collaboration with design and verification teams, and development of advanced STA methodologies to ensure robust timing closure.

The candidate will drive automation of timing analysis, prepare detailed reports, and stay updated on emerging STA trends, contributing to continuous process

Qualifications

• 5+ years of experience in Static Timing Analysis.
• Proven track record in STA execution and timing closure.
• Strong knowledge of STA tools and methodologies.

Responsibilities

• Own Subsystem level STA, directing Timing closure & Synthesis report analysis.
• Collaborate with IP & Design teams for timing constraints development & review.
• Develop and implement advanced STA methodologies to meet timing closure for complex IC designs.
• Work with cross-functional teams to ensure integration and optimal timing performance.
• Drive STA scripts and tools to automate timing analysis processes.
• Prepare timing reports and technical documentation for stakeholders.

Skills

STA

Timing closure

Digital design

Cross-functional collaboration

Problem solving

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Tools

Synopsys PrimeTime

Cadence Tempus

Constraints Manager

Job description

Senior ASIC Digital Engineer (STA, Sign Off) with 5 to 7 years of experience

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description Position Overview:

We are seeking a highly skilled and experienced Staff Engineer for our Static Timing Analysis (STA) function. The successful candidate will be part to a team of talented engineers responsible for ensuring the timing performance and integrity of our complex semiconductor designs. This role requires a deep understanding of STA methodologies, leadership skills, and a strategic vision to drive continuous improvement in our timing analysis processes.

Key Responsibilities:

• Own Subsystem level STA , providing direction and guidance to PnR team for Timing closure & Synthesis report analysis.
• Work with IP & Design team for Timing constraints Development & Review activities.
• Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs.
• Collaborate with cross-functional teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing performance.
• Drive the development and maintenance of STA scripts and tools to automate and streamline timing analysis processes.
• Conduct thorough timing analysis, identify critical paths, and develop strategies to mitigate timing violations and improve overall design performance.
• Stay abreast of industry trends and emerging technologies in STA and related fields, and incorporate best practices into the team’s workflow.
• Prepare and present detailed timing reports and technical documentation to stakeholders
• Foster a culture of innovation, collaboration, and continuous improvement within the STA team.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• A minimum of 5 years of experience in Static Timing Analysis.
• Proven track record of successfully executing STA
• In-depth knowledge of STA tools (e.g., Synopsys PrimeTime, Cadence Tempus , Constraints Manager) and methodologies.
• Strong understanding of digital design principles, physical design, and semiconductor fabrication processes.
• Excellent problem-solving skills and the ability to think strategically and analytically.
• Exceptional communication and interpersonal skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.
• Ability to prioritize tasks and manage multiple project work simultaneously.
• A proactive, results-oriented mindset with a passion for innovation and continuous improvement.
• Experience with advanced process nodes (e.g., 7nm, 5nm) is highly desirable.

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [e-mail] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying

Experience Level Senior Level