Senior ASIC Design Engineer - XBAR IP

NVIDIA Gruppe; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

NVIDIA Gruppe is looking for passionate and creative senior design engineers to join its Graphics team in Bengaluru, India. The role involves ownership of micro-architecture and RTL development of design modules in cutting-edge memory subsystem components for Graphics Processors.

The ideal candidate will have 4+ years of design experience, expertise in Verilog, and a deep understanding of ASIC design flow, with opportunities in a dynamic technology environment.

Qualifications

• 4+ years of design experience.
• Experience in RTL design of complex design units for at least two or three projects.
• Deep understanding of ASIC design flow.

Responsibilities

• Own micro-architecture and RTL development of design modules.
• Collaborate with verification teams to verify design correctness.
• Interact with FPGA and S/W teams to prototype the design.

Skills

Micro-architecture and RTL development

Design experience

Design and verification tools

Expertise in Verilog

Education

BS / MS or equivalent experience

Tools

VCS or equivalent simulation tools

Debug tools like Debussy, GDB

Job description

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state-of-the-art memory subsystem components used in its industry-leading Graphics Processors.

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you’ll be doing

• Own micro-architecture and RTL development of design modules.
• Micro-architect features to meet performance, power and area requirements.
• Work with HW architects to define critical features.
• Collaborate with verification teams to verify the correctness of implemented features.
• Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
• Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested.
• Work on post-silicon verification and debug.

Qualifications

• BS / MS or equivalent experience.
• 4+ years of design experience.
• Experience in RTL design of complex design units for at least two or three projects.
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
• Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
• Expertise in Verilog.

How to stand out

• Design experience in memory subsystem or network interconnect IP.
• Good debugging and problem solving skills.
• Scripting knowledge (Python/Perl/shell).
• Leadership experience in leading small 2-3 member teams.
• Good interpersonal skills and ability & desire to work as a part of a team.

NVIDIA is an equal opportunity employer and values diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.