Senior ASIC Design Engineer

Hewlett Packard Enterprise India Private Limited; Bengaluru; On-site; INR 4,000,000 - 6,500,000; Full time

Job summary

Hewlett Packard Enterprise India Private Limited is seeking a Senior ASIC Design Engineer in Bengaluru to define and architect high-performance blocks for networking ASICs. The role emphasizes micro-architecture, low-power design, and collaboration with verification and physical design teams to meet timing and quality goals.

The candidate will bring strong Verilog RTL skills, experience with industry tools, and a background in networking protocols and memory subsystems.

Qualifications

• Strong Verilog RTL coding skills.
• Experience with Synopsys Design Compiler, Verplex LEC, Spyglass.
• Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus.
• Knowledge of high-performance memory subsystems.
• Knowledge of multi-domain clock synchronization and high-speed serial interfaces.
• Excellent written and verbal communications skills.
• MSEE or BSEE is required.

Responsibilities

• Define and architect high-performance blocks for the latest, most advanced networking ASICs.
• Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power.
• Collaborate with the verification team in the development of the testplan and assist in debugging test failures.
• Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes.

Skills

Verilog RTL

ASIC design

Networking protocols

Debugging skills

Communication skills

Education

MSEE

BSEE

Tools

Synopsys Design Compiler

Verplex LEC

Spyglass

Job description

Senior ASIC Design Engineer

This role has been designed as “Onsite” with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description:

Job Family Definition: Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition: Contributions include applying developed subject matter expertise to solve common and sometimes complex technical problems and recommending alternatives where necessary. Might act as project lead and provide assistance to lower level professionals. Exercises independent judgment and consults with others to determine best method for accomplishing work and achieving objectives.

What you’ll do:

• Define and architect high-performance blocks for the latest, most advanced networking ASICs
• Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
• Collaborate with the verification team in the development of the testplan and assist in debugging test failures
• Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes

What you need to bring:

• Strong Verilog RTL coding skills
• Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
• Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
• Knowledge of high performance memory subsystems
• Knowledge of multi-domain clock synchronization and high-speed serial interfaces
• Strong problem solving and ASIC debugging skills
• Excellent written and verbal communications skills
• MSEE or BSEE is required

What We Can Offer You:

• Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
• Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.
• Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let’s Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE. #india#networking

Job: Engineering Job Level: TCP_03

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

HPE is EEO Protected Veteran/ Individual with Disabilities.

Experience Level Senior Level