Principal Layout Design & Integration Engineer

Ampere; Bengaluru Urban; On-site; INR 4,000,000 - 7,000,000; Full time

Benefits offered by this job

Premium health insurance

Retirement plan

Fully catered lunch in office

Creche reimbursement

Job summary

Ampere is seeking a seasoned Layout Engineer to deliver precise layouts for 3nm technology, ensuring LVS, DRC, ERC, EM, and IR compliance. Collaborate across regions with P&R teams, mentor juniors, and drive high-quality design execution.

The role requires strong cross-functional coordination and a proactive problem-solving mindset. Lead the floorplanning, macro integration, LEF debugging, and tapeout support while leveraging in-house tools and Cadence/Mentor suites to achieve optimal

Qualifications

• Bachelor's degree with 8 years or Master's with 6 years in custom layout design.
• Hands-on experience with 3nm technology is essential.
• Experience laying out custom digital components such as SRAM, register files, and standard cells.
• High proficiency in designing custom analog blocks including amplifiers, PLL, LDO, and resistor ladders.
• Experience with full-chip integration of custom IP alongside P&R teams.
• Knowledge of Design for Manufacturability (DFM), hierarchical layout techniques, device matching, and low-parasitic layout practices.
• Good understanding of Electromigration (EM) and IR drop analysis.
• Proficient with Cadence XL/GXL/EXL and Mentor Graphics Calibre tools; Cadence Innovus is a plus.
• Experience with Totem tools for EM/IR analysis is advantageous.
• Programming skills are a plus but not required.
• Excellent communication across locations and time zones.

Responsibilities

• Collaborate with the Place & Route (P&R) team to resolve full-chip integration issues.
• Develop methods to simplify custom macro integration into the P&R flow.
• Floorplan and build out cells, blocks, and macros efficiently.
• Understand, create, and debug LEF files to support design processes.
• Design complex layouts for analog and digital circuits using deep submicron technologies.
• Analyze LVS, DRC, ERC, EM, and IR results to identify and resolve issues.
• Identify schematic or layout problems and work with engineering teams to address them.
• Work on multiple projects across different technologies simultaneously.
• Learn and use Ampere’s in-house design tools.
• Coordinate with circuit engineers across regions and time zones.
• Support and assist during tapeout phases to ensure successful project completion.
• Contribute ideas as part of a small, collaborative team.
• Coach and train junior engineers to foster skill development.

Skills

Analog layout design

Digital layout design

Full-chip integration

EM/IR analysis

DFM & low-parasitic layout

Cadence XL/GXL/EXL

Mentor junior engineers

Cross-region collaboration

Education

Bachelor's degree in custom layout design

Master's degree in relevant field

Tools

Cadence XL/GXL/EXL

Mentor Graphics Calibre

Cadence Innovus

Totem EM/IR tools

Job description

Invent the future with us.

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.

Description

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team-we’dlove to have you apply!

About The Role

As a vital member of the layout team, you will be responsible for delivering precise layouts that comply with LVS, DRC, ERC, EM, and IR standards. Your role will require close collaboration with cross-functional teams to ensure smooth full-chip integration and high-quality design execution. You should be self-motivated, capable of independently resolving critical issues, managing schedules, and leading others to successfully complete their tasks. Additionally, you will mentor junior team members to enhance their skills and support their professional growth.

What You’ll Achieve

• Collaborate with the Place & Route (P&R) team to resolve full-chip integration issues.
• Develop and improve methodologies to simplify custom macro integration into the P&R flow.
• Floorplan and build out cells, blocks, and macros efficiently.
• Understand, create, and debug LEF files to support design processes.
• Design complex layouts for both analog and digital circuits using deep submicron technologies.
• Analyze and interpret LVS, DRC, ERC, EM, and IR results to identify and resolve issues.
• Identify schematic or layout problems and work closely with engineering teams to address them.
• Ability to work on multiple projects across different technologies simultaneously.
• Learn and effectively utilize Ampere’s in-house design tools.
• Coordinate with circuit engineers located in different regions and time zones.
• Support and assist during tapeout phases to ensure successful project completion.
• Contribute ideas as an integral part of a small, collaborative team.
• Coach and train junior engineers to foster skill development within the team.

About You

• Bachelor's degree with 8 years or Master’s degree with 6 years of experience in custom layout design
• Current hands-on experience with 3nm technology is essential
• Exposure and experience in laying out custom digital components such as SRAM, register files, and standard cells
• High proficiency in designing custom analog blocks including amplifiers, PLL, LDO, and resistor ladders
• Experience with full-chip integration of custom IP alongside P&R teams
• Solid knowledge of Design for Manufacturability (DFM), hierarchical layout techniques, device matching, and low-parasitic layout practices
• Good understanding of Electromigration (EM) and IR drop analysis
• Proficient with Cadence XL/GXL/EXL and Mentor Graphics Calibre tools
• Familiarity with Cadence Innovus is a plus
• Experience with Totem tools for EM/IR analysis is advantageous
• Programming skills are a plus but not required
• Excellent communication skills with the ability to collaborate effectively across multiple locations and time zones

What We’ll Offer

At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits.

Benefits Highlights Include

• Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work.
• Generous paid time off policy so that you can embrace a healthy work-life balance
• Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day.

And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.

Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.