Principal Analog Design Lead - MCU

NXP Semiconductors NV; Maharashtra; On-site; INR 4,500,000 - 7,500,000; Full time

Job summary

NXP Semiconductors NV in India is seeking a senior SoC analog architect to define architectures and IP requirements, lead an analog team, and own mixed-signal IP for MCU products. You will ensure robust design through implementation, simulation, layout and verification in alignment with R&D practices.

The role emphasizes collaboration with SOC teams, thorough documentation, and post-tapeout support for reliability and industrialization.

Qualifications

• Bachelor’s degree in electronic/electrical engineering; Master’s preferred.
• 10+ years product development with IC-design or semiconductor experience.
• Experience with ADC/DAC, PLL, oscillators, references, LDOs and related IP.
• Strong communication and mentoring abilities.

Responsibilities

• Define SOC analog architecture and IP-level specs for MCU products.
• Lead analog team and coordinate SOC design activities across teams.
• Oversee implementation, simulation, layout, and validation of mixed-signal IP.
• Provide design reviews and documentation for industrialization and reliability.

Skills

SoC Architecture

Analog IP

Team Leadership

Simulation

Layout & Verification

MCU IP

Education

Bachelor's degree in electronic/electrical engineering

Master’s degree preferred

Tools

AMS modeling

Matlab

SystemC

Job description

Role Summary

• Define SoC analog architecture and IP requirements starting from system level specifications.
• Drive circuit architectures definition and best-in-class design implementation capable of meeting R&D targets in terms of innovation, performance and reliability.
• Create and ensure robust and high-quality IP from requirements.
• Project leading and manager of the analog team assigned to the project.
• Ownership for the implementation, simulation, layout, and validation of mixed signal IP for microcontrollers (MCUs). This IP could be data converters (ADC, DAC), clock generators (crystal oscillators, free running oscillators, PLL) or any other miscellaneous analog or mixed signal IP that adds value to NXP MCUs products, in line with R&D design methodology.
• Local or remote co-working with the other project leader during SOC design execution.
• Provide technical documentation required for design reviews, SOC integration, industrialization and reliability.

Role Summary

• Define SoC analog architecture and IP requirements starting from system level specifications.
• Drive circuit architectures definition and best-in-class design implementation capable of meeting R&D targets in terms of innovation, performance and reliability.
• Create and ensure robust and high-quality IP from requirements.
• Project leading and manager of the analog team assigned to the project.
• Ownership for the implementation, simulation, layout, and validation of mixed signal IP for microcontrollers (MCUs). This IP could be data converters (ADC, DAC), clock generators (crystal oscillators, free running oscillators, PLL) or any other miscellaneous analog or mixed signal IP that adds value to NXP MCUs products, in line with R&D design methodology.
• Local or remote co-working with the other project leader during SOC design execution.
• Provide technical documentation required for design reviews, SOC integration, industrialization and reliability.

Your Responsibility

• Define SOC analog architecture and IP-level specifications related to microcontroller products (MCU) new design with the target of quality and industrialization.
• Verify expected performances are met using simulation (behavioral, transistor level or combinations) and they are matching silicon performances.
• Drive analog team during new SOC development and alignment with R&D global design methodology.
• Co-operation with SOC teams on quality integration of the analog IP/modules within new SOC products.

Your Responsibility

• Define SOC analog architecture and IP-level specifications related to microcontroller products (MCU) new design with the target of quality and industrialization.
• Verify expected performances are met using simulation (behavioral, transistor level or combinations) and they are matching silicon performances.
• Drive analog team during new SOC development and alignment with R&D global design methodology.
• Co-operation with SOC teams on quality integration of the analog IP/modules within new SOC products.
• Provide documentation of the design, design reviews, and integration requirements of IP and sub-systems.
• Guarantee post tape-out support - characterization, production test, life testing, debug.

Your Profile

• Bachelor's degree in electronic/electrical engineering required, Master’s degree is preferred.
• 10+ years of product development with IC-design Company experience.
• Experience with one or more of these IP areas: ADC, DAC, PLL, oscillators, Voltage and current references, LDO, DC-DC, PGA, amplifiers, filters, etc...
• Experience creating and using behavioral models is a plus (AMS, DMS, Matlab, System-C or equivalent).
• Strong communication and teamwork skills are required.
• Mentoring and development of junior engineers.

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