Principal AMS Verification Engineer

1840 Micron Tech. OP India LLP; Hyderabad; On-site; INR 700,000 - 1,200,000; Full time

Job summary

1840 Micron Tech. OP India LLP in Hyderabad seeks qualified candidates for a role focusing on verification of analog and mixed-signal circuits. The responsibilities include generating a full-chip simulation environment and conducting various electrical checks and simulations.

Candidates should possess knowledge in MOS device physics, basic analog circuits, and familiarity with scripting. This position emphasizes collaboration with various engineering and marketing teams to ensure product excellence.

Qualifications

• Understanding of MOS device physics, mainly second-order effects.
• Basic knowledge of analog circuits – CM, BGR, op-amp, regulators, ADC, DAC and charge pumps.
• Familiarity with shell, Perl/python scripting.
• Familiarity with Virtuoso, HSPICE, XCalibre (XA) and cosimulation.
• Familiarity with HDLs – Verilog/V, Verilog-A/AMS.
• Debug mindset with a system-level outlook.
• Ability to grasp complex workflows and maintain a constant drive to innovate.
• Proven ability to leverage AI-assisted coding techniques.

Responsibilities

• Verification of analog and mixed-signal circuits.
• Generation of full-chip mixed-signal simulation environment.
• Schematic/behavioral model generation.
• Device-level electrical rule checks.
• Static and dynamic simulations to identify leakage paths.
• SPF extraction and fanout checks.
• Power cycling simulations.
• Chip-level user-mode simulations.
• Design data sheet review and generation of verification plan.
• Collaborate with engineering and marketing teams.

Skills

Understanding of MOS device physics

Basic knowledge of analog circuits

Familiarity with scripting (shell, Perl/python)

Familiarity with Virtuoso, HSPICE, XCalibre

Familiarity with HDLs (Verilog/V, Verilog-A/AMS)

Debug mindset with a system-level outlook

Drive to innovate

Leveraging AI-assisted coding techniques

Job description

Responsibilities

• Verification of analog and mixed-signal circuits.
• Generation of a full-chip mixed-signal simulation environment where analog, digital and firmware co-exist.
• Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient.
• Device-level electrical rule checks – SOA, snapback, SFB, etc.
• Static and dynamic simulations to identify leakage paths.
• SPF extraction and fanout, coupling checks.
• Power cycling simulations – PL and brown-out events.
• Chip-level user-mode simulations correlating analog subsystems, logic and firmware algorithms.
• Design data sheet review and generation of verification plan.
• Collaborate with groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize manufacturing functions, cost, quality, reliability, time-to-market and customer satisfaction.

Qualifications

• Understanding of MOS device physics, mainly second-order effects.
• Basic knowledge of analog circuits – CM, BGR, op-amp, regulators, ADC, DAC and charge pumps.
• Familiarity with shell, Perl/python scripting.
• Familiarity with Virtuoso, HSPICE, XCalibre (XA) and cosimulation.
• Familiarity with HDLs – Verilog/V, Verilog-A/AMS.
• Debug mindset with a system-level outlook.
• Ability to grasp complex workflows and maintain a constant drive to innovate.
• Proven ability to leverage AI-assisted coding techniques to improve efficiency or automate design and analysis methodologies.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail].

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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