PMTS Package designer Job Description :

Tsavorite Scalable Intelligence; Bengaluru; On-site; INR 3,500,000 - 7,000,000; Full time

Job summary

Tsavorite Scalable Intelligence in Bengaluru, India, is seeking a senior IC packaging engineer to lead flip-chip BGA package design for leading edge AI products. You will own substrate layout from start to tape-out, coordinate with silicon, package, and board teams, and ensure DFx and DFM considerations are met.

Ideal candidate has 14+ years in high-layer-count flip-chip designs, SI/PI expertise, and experience with Serdes (PCIe Gen6) and memory interfaces.

Qualifications

• 14+ years of experience in flip-chip BGA package design.
• Expertise in large form-factor, high-layer-count designs, stack-ups, and tape-out.
• Strong knowledge of SI and PI for package-level designs.

Responsibilities

• Lead the package design of leading-edge AI products for Tsavorite.
• Perform feasibility studies for new IP and packaging concepts.
• Own substrate layout from start to tape-out and coordinate cross-functional teams.
• Interface with OSAT/packaging suppliers to ensure DFx and BOM documentation.

Skills

Flip-chip BGA

High-layer-count stack-ups

SiP/IP feasibility

Signal integrity

Power integrity

Serdes PCIe Gen6

DDR/HBM interfaces

Tape-out readiness

Tools

Mentor Xpedition

Job description

Founded in 2023,by Industry veterans HQ in California,US

Company Description:

We are product based startup. The products are chipsets and intelligent machines that enable scalable enterprises AI, streaming video intelligence, training trillion parameter models, and fine-tuning LLMs, allowing enterprises to improve productivity with advanced solutions. We are looking for exceptional talent and leadership to join our organization, the world’s first company developing Agentic Silicon for powering the future of AI.

We are pioneering a new era in AI innovation focused on accelerating the

adoption of end-to-end enterprise AI, from the edge to Zettascale systems.

Our cutting-edge Software and composable silicon Chiplets will transform the way AI models are Trained, Deployed, and Scaled.

"Join Our Growing Team!"

We are building a world-class team to drive innovation in AI Silicon & Software and hiring for below position in Bangalore

Qualifications:

• More than 14+ years of experience in the flip chip BGA package design
• Experience working on the Large Formfactor, high layer count designs, Stack-up definition, Bump and ball map definition, Package outline drawings
• Very good understanding of the package design rules as well as design for manufacturing and successful tape out of multiple designs.
• Knowledge of Package level signal integrity and power integrity.
• Worked on High speed Serdes(PCIE Gen6, 112-224 G Ethernet) and memory interface like DDR5, LPDDR and HBM.
• Mentor Xpedition experience is preferred.

Responsibilities:

• Responsible for the package design of the Leading edge AI products for Tsavorite.
• Responsible for the feasibility studies for the new IP definition and Package design concepts.
• Owning the substrate layout design from start to end and taping out multiple products
• Co-design between Silicon, package and board.
• Collaborate closely with the Signal integrity, power integrity leads, PCB design, Mechanical and thermals to optimize the design to meet the product requirements.
• Interface with the OSAT/Packaging suppliers to understand the design rules, review the package design, meet DFM requirements and Documentation of BOM.