Physical Design Sr / Lead / Staff Engineer - Camera

Qualcomm; Bengaluru; On-site; INR 1,400,000 - 2,800,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru seeks a seasoned Hardware Engineer with 3–15 years of experience in Physical Design to own end-to-end PD flow from netlist to GDSII, covering floorplanning, Place & Route, CTS, and STA signoff.

You will drive low-power design, power integrity, and timing convergence using Fusion Compiler, Genus, Innovus, PrimeTime, Tempus, Voltus and RedHawk, while scripting in Perl, Python and TCL to automate flows.

Qualifications

• Bachelor's degree in CS/EE or related field with 4+ years hardware engineering.
• Experience in Physical Design flow from floorplanning to post-route timing signoff.
• Hands-on experience owning end-to-end Physical Design from netlist to GDSII.
• Strong knowledge of power optimization and low-power techniques.

Responsibilities

• Collaborate with cross-functional teams (Design, CAD) to address critical physical design challenges in Camera PNR Implementation.
• Develop innovative techniques within Physical Design and optimization space to meet stringent PPA targets.
• Engage with external CAD tool vendors and internal CAD teams to identify and enhance optimization issues related to Camera designs.
• Partner with all block-level implementation teams to analyze, implement, and improve optimization methods relevant to the designs.

Skills

Physical Design

Floorplanning

Clock Tree Synthesis

Timing Signoff

Low Power Design

PDN design

PPA optimization

Scripting: Python

VLSI concepts

Education

Bachelor's degree in CS/EE

MS in related field

PhD in related field

Tools

Fusion Compiler

Genus

Innovus

PrimeTime

Tempus

Voltus

RedHawk

Job description

Job Area

Engineering Group, Engineering Group > Hardware Engineering

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

Experience

General Summary:

• 3 - 15 years of experience in Physical Design, including floorplanning, Place & Route (PNR), Clock Tree Synthesis (CTS), and STA signoff checks


• Hands-on experience owning end-to-end Physical Design from netlist to GDSII, including HM-level PV, LEC, low-power checks, PDN design, and STA closure


• Experience with voltage islands and low-power design methodologies, flows, and implementation


• Strong focus on achieving optimal PPA (Power, Performance, Area)


• Strong familiarity with industry-standard tools such as Fusion Compiler (FC), Genus, Innovus, , PrimeTime (PT), Tempus, Voltus, and RedHawk


• Solid understanding of the full Physical Design flow from floorplanning to post-route optimization and timing signoff, including IR drop analysis and physical verification


• Experience in implementing complex ECOs for timing convergence across multiple corners using Tweaker, Tempus, and physical ECO flows in PrimeTime


• Knowledge of power optimization techniques and methods to minimize power consumption


• Experience in deep submicron technology nodes (preferred)


• Understanding of high-performance and low-power implementation techniques (preferred)


• Strong fundamentals in Physical Design and VLSI concepts


• Proficiency in scripting languages such as Perl, Python and TCL

Roles and Responsibilities

• Collaborate with cross-functional teams (Design, CAD) to address critical physical design challenges in Camera PNR Implementation.


• Develop innovative techniques within Physical Design and optimization space to meet stringent PPA targets.


• Engage with external CAD tool vendors and internal CAD teams to identify and enhance optimization issues related to Camera designs.


• Partner with all block-level implementation teams to analyze, implement, and improve optimization methods relevant to the designs.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Applicants

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