Physical Design Engineer, Sr Lead

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Qualcomm in Bengaluru is looking for a Hardware Engineer to innovate and drive the development of cutting-edge electronic systems, focusing on enhancing performance, efficiency, and scalability.

The ideal candidate will have a strong background in Physical Design, collaborative skills, and experience with industry-standard tools. A degree in Computer Science or Engineering is required, along with hands-on experience in Full Physical Design processes.

Qualifications

• 6+ years of experience in Physical Design.
• Hands-on experience with end-to-end Physical Design processes.
• Strong fundamentals in Physical Design and VLSI concepts.

Responsibilities

• Collaborate with cross-functional teams to address physical design challenges.
• Develop innovative techniques to meet PPA targets.
• Engage with CAD tool vendors for optimization issues.

Skills

Physical Design

Power Optimization

Scripting languages (Perl, Python, TCL)

Low-Power Design Methodologies

Industry-standard Tools (Fusion Compiler, Genus, Innovus)

Education

Bachelor's degree in Computer Science or Engineering

Master's degree

PhD

Tools

Fusion Compiler

Innovus

PrimeTime

Voltus

RedHawk

Job description

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring‑up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting‑edge, world class products. Qualcomm Hardware Engineers collaborate with cross‑functional teams to develop solutions and meet performance requirements.

Qualcomm Bangalore Camera Team

Qualcomm Bangalore Camera Team is focused on developing high‑performance, power‑efficient, and highly optimized cores. In this role, you will drive end‑to‑end ownership of complex hierarchical modules, taking designs from RTL to GDSII, including synthesis, place & route, and timing closure, with a strong emphasis on achieving best‑in‑class PPA (Power, Performance, Area). You will play a key role in delivering designs that push the boundaries of performance, efficiency, and scalability.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Experience

• 6+ years of experience in Physical Design, including floorplanning, Place & Route (PNR), Clock Tree Synthesis (CTS), and STA signoff checks.
• Hands‑on experience owning end‑to‑end Physical Design from netlist to GDSII, including HM‑level PV, LEC, low‑power checks, PDN design, and STA closure.
• Experience with voltage islands and low‑power design methodologies, flows, and implementation.
• Strong focus on achieving optimal PPA (Power, Performance, Area).
• Strong familiarity with industry‑standard tools such as Fusion Compiler (FC), Genus, Innovus, PrimeTime (PT), Tempus, Voltus, and RedHawk.
• Solid understanding of the full Physical Design flow from floorplanning to post‑route optimization and timing signoff, including IR drop analysis and physical verification.
• Experience in implementing complex ECOs for timing convergence across multiple corners using Tweaker, Tempus, and physical ECO flows in PrimeTime.
• Knowledge of power optimization techniques and methods to minimize power consumption.
• Experience in deep submicron technology nodes (preferred).
• Understanding of high‑performance and low‑power implementation techniques (preferred).
• Strong fundamentals in Physical Design and VLSI concepts.
• Proficiency in scripting languages such as Perl, Python and TCL.

Roles and Responsibilities

• Collaborate with cross‑functional teams (Design, CAD) to address critical physical design challenges in Camera PNR Implementation.
• Develop innovative techniques within Physical Design and optimization space to meet stringent PPA targets.
• Engage with external CAD tool vendors and internal CAD teams to identify and enhance optimization issues related to Camera designs.
• Partner with all block‑level implementation teams to analyze, implement, and improve optimization methods relevant to the designs.

Equal Opportunity Employer

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process.