Member of Technical Staff (MTS)

ChipEdge Technologies Pvt Ltd.; Bengaluru; Sur place; INR 900 000 - 1 500 000; Plein temps

Résumé du poste

ChipEdge Technologies Pvt Ltd. in Bengaluru invites applications for the Member of Technical Staff (MTS) within our VLSI Training Program.

The role focuses on supporting the Physical Design course, guiding labs, and helping students learn synthesis, placement, routing, and design optimization. The candidate should have strong knowledge of digital design, CMOS devices, and HDL; familiarity with Cadence Innovus and Synopsys ICC2 is preferred.

Qualifications

• Trained candidates in Physical Design are preferred.
• Strong understanding of digital design and CMOS devices.
• HDL knowledge: Verilog/VHDL; scripting in Python/TCL is a plus.
• Experience in teaching Physical Design or related roles.

Responsabilités

• Lead or assist lab sessions covering synthesis, placement, routing, and design optimization.
• Provide guidance on industry-standard EDA tools for physical design tasks.
• Review and grade assignments, quizzes, and exams; give constructive feedback.
• Guide student projects and develop course content on floorplanning and CTS.
• Collaborate with faculty to ensure high course quality and learning experience.
• Support ongoing updates to labs and tutorials.

Connaissances

CMOS Theory

Verilog HDL

Physical Design

Synthesis

Floorplanning

CTS

Routing

EDA Tools

Python Scripting

Communication Skills

Formation

MSc Electronics/Physics

BE in ECE/EEE

MTech in VLSI/Related

Outils

Cadence Innovus

Synopsys ICC2

Description du poste

Job Title: Member of Technical Staff (MTS)

Department: VLSI Training Program

Position Type: Full Time

Job Summary

We are seeking a motivated and knowledgeable Member of Technical Staff (MTS) to support the Physical Design course . This position is ideal for candidates with strong passion for a career in VLSI , and trained in Physical Design.

Key Responsibilities

• Conduct and Support Labs: Lead or assist lab sessions, ensuring students understand the physical design process, including synthesis, placement, routing, and design optimization.
• Provide Technical Guidance: Offer students support in using industry-standard EDA tools, such as Cadence, Synopsys for physical design tasks.
• Review and Grade Assignments: Help grade assignments, projects, quizzes, and exams; provide feedback to students.
• Support Project Work: Guide students in projects, help them implement physical design projects.
• Develop Course Content: Assist in updating or creating assignments, labs, and tutorials on topics such as floorplanning, clock tree synthesis, power optimization, and DRC/LVS checks.
• Collaborate with Faculty: Work closely with course instructors to ensure a smooth learning experience for students and maintain high course quality.

Required Qualifications

• Education: M.Sc ( Electronics/ Physics), B.E in ( ECE,EEE), M.tech in ( VLSI) / Related fields.
• Experience: Relevant teaching experience in Physical Design or a related role.
• Certifications: Relevant certifications in physical design (e.g., Synopsys ICC, Cadence Innovus tools) are highly preferred.

Required Skills and Experience

• Trained candidates in Physical Design are preferred.
• Technical Expertise: Strong understanding of digital design,CMOS Devices,Verilog HDL and good knowledge in physical design flow (synthesis, floorplanning, placement, CTS and routing).
• EDA Tool Proficiency: Familiarity with EDA tools such as Cadence Innovus, Synopsys ICC2.
• Communication Skills: Ability to communicate complex concepts effectively and provide clear, constructive feedback.
• Organizational Skills: Strong organizational and time management skills to balance the responsibilities and commitments.
• Programming Skills: Knowledge of scripting (Python, TCL) for automating design tasks and a working understanding of HDL (Verilog/VHDL) is a big plus.
• Experience: Previous teaching experience in VLSI, digital design, or a related area are preferred.

Compensation

Based on Experience and qualifications.