Lead FPGA Firmware Engineer

GE Vernova

Hyderabad

On-site

INR 4,500,000 - 7,500,000

Full time

9 days ago

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Job summary

GE Vernova is seeking a Lead FPGA Firmware Engineer to define requirements and enhance features for world-class control and protection systems in HVDC projects. You will collaborate with global engineers to deliver hardware and firmware that meet strict timelines and performance goals.

The role demands extensive FPGA design experience (VHDL/Verilog), strong debugging skills, and hands-on hardware knowledge, including high-speed PCB design, in a multi-disciplinary team environment.

Qualifications

  • 8+ years of experience in electrical/electronic engineering.
  • 5+ years of FPGA design using VHDL or Verilog.
  • Strong knowledge of electronic components and principles.
  • Exceptional hardware/FPGA debugging skills.
  • Experience with Altera, Microsemi, Xilinx FPGA devices and design tools (Quartus II, Libero SoC).
  • Ability to work independently or in a multidisciplinary team to resolve issues.
  • Experience designing hardware for real time control applications.
  • High-speed digital hardware design and PCB layout skills.

Responsibilities

  • Analyse system requirements and define hardware functions.
  • Develop FPGA firmware to meet product requirements.
  • Maintain and upgrade legacy products to extend life.
  • Create and maintain manufacturing data packs.
  • Write functional specifications and test plans.
  • Participate in design reviews and ensure documentation.
  • Adhere to company design standards and processes.

Skills

FPGA debugging
Hardware design
Real-time control
Team collaboration
Perl/Python scripting

Education

Electrical/Electronic engineering degree

Tools

Quartus II
Libero SoC
Xilinx FPGA tools
Altera

Job description

Job Description Summary

The Lead FPGA Firmware Engineer will be working to define requirements, enhance product features for an electronic design for world-class Control & Protection system in VSC and LCC systems, VBE, working together with engineers based in global locations. The role is accountable for business-critical design, development to meet product requirements and timelines for future commercial HVDC projects.

Job Description

Roles and Responsibilities

  • Analysing system requirements and defining functions to be implemented in Hardware.
  • Strong Knowledge and experience of Model Based Design (MAT LAB Simulink, HDL coder, Xilinx System Generator)
  • FPGA Firmware development.
  • Analogue and digital Hardware design.
  • Maintain legacy products including updates and improvements to extend product life span.
  • Contribution to creating and maintaining manufacturing data packs.
  • Writing functional specifications for design.
  • Writing test specifications (Routine test, Type test, Test Harness).
  • Participating in and contributing to design reviews.
  • Ensuring designs are documented to Company standards.

Required Qualifications

  • Degree or Higher in Electrical / Electronic engineering or equivalent experience with 8+ years experience
  • Minimum 5+ years' experience of FPGA design using VHDL or Verilog.
  • Strong all-round knowledge and understanding of electronic components & principles.
  • Exceptional hardware / FPGA debugging skills.
  • Experience with Altera, Microsemi, Xilinx FPGA devices and design tools (Quartus II, Libero SoC).
  • Dynamic and proactive with ability to work on own or as part of a multi-disciplinary engineering team to resolve technical issues.
  • Experience of designing hardware for real time control applications.
  • High-speed digital hardware design and PCB layout skills.

Desired Qualifications

  • Good verbal and written communication skills.
  • Motivated great teammate, self-starter, results oriented.
  • Agile development practices e.g., Scrum
  • Scripting experience using Perl, Python
  • Experience of version control, e.g., SVN, GIT
  • Bug tracking tools, e.g., JIRA
  • Power Electronics control system design.
  • Knowledge of HVDC
Additional Information

Relocation Assistance Provided: Yes

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