Lead Analog Design Engineer

Samsung Electronics Perú; Bengaluru; On-site; INR 2,000,000 - 2,500,000; Full time

Job summary

A leading semiconductor firm in Bengaluru is seeking a Lead Analog Design Engineer with 8 to 12 years of experience in designing custom Analog circuits, specifically in SerDes based architectures and high speed applications. The successful candidate will mentor junior members and thrive in a dynamic environment. This role offers the opportunity to work on cutting-edge technologies in an innovative workplace.

Qualifications

• 8 to 12 years of experience in designing custom Analog circuits.
• Strong background in designing high speed Analog & Mixed signal blocks.
• Experience in mentoring junior team members.

Responsibilities

• Design and develop high speed Analog & Mixed signal blocks.
• Work in a dynamic environment handling multiple products.
• Conduct silicon testing/debug.

Skills

Analog circuit design

SerDes based Architectures

High speed Analog & Mixed signal blocks

Silicon testing/Debug

Mentoring junior team members

Education

B.Tech/B.E/M.Tech/M.E

Job description

Lead Analog Design Engineer page is loaded## Lead Analog Design Engineerposted on: Posted 24 Days Agotime left to apply: End Date: October 15, 2026 (30+ days left to apply)job requisition id: R109818**Position Summary****Role and Responsibilities****About Samsung Semiconductor India Research (SSIR)**With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.**Roles and Responsibilities**· 13 – 22 years of experience in designing custom Analog circuits for SerDes based Architectures.· Strong Analog design background with experience in design and developing of high speed Analog & Mixed signal blocks including transmitters,receivers,clocking,Equalizer,serializer/deserializer for PHY IP's like UCIe, PCIe, in advanced process technologies(FINFET and GAA)· Experience in Analog circuit design for high speed serial interface application like Die-to-Die, UA Link or experience in high speed architectures (56/112/224 GbpS) is preferred.· Experience in PAM4 based architectures for Ethernet SerDes is plus.· Experience in SerDes in design with silicon bring-up is plus but not a must.· Experience in mentoring junior team members.· Design experience of Full Chip is good to have.· Experience in Silicon testing/Debug is a plus.· Should be able to work in a dynamic environment with multiple products & product lines.**Experience – 8 to 12 Years****Qualifications*** B.Tech/B.E/M.Tech/M.E**Disclaimer**Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.**Skills and Qualifications**\* Please visit to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click .