IP Verification Engineer 0402

Sunrise Biztech Systems; Hyderabad; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Hyderabad is seeking an experienced IP/SoC verification engineer to join the ACP IP Verification team. You will develop, test and verify complex IP blocks using SystemVerilog and UVM, working closely with Design, Architecture, and SoC teams.

The role emphasizes AI/GenAI-assisted verification, creating test plans, functional coverage and SVA assertions, and driving verification productivity from IP to tapeout.

Qualifications

• Bachelor's or Master's degree in Electrical / Electronics / Computer Engineering or related field.
• 5+ years of hands-on ASIC/IP/SoC Design Verification experience.

Responsibilities

• Develop and maintain UVM-based verification environments and testbenches.
• Create and execute detailed verification test plans for IP blocks.
• Develop functional coverage and SVA assertions.
• Verify IP functionality at IP and SoC levels.
• Debug RTL and testbench issues and drive coverage closure.
• Work with Design, DV, Architecture, and SoC teams through verification and tapeout.
• Leverage AI/GenAI tools and methodologies to improve verification productivity and automation.

Skills

SystemVerilog

UVM

IP / SoC Design Verification

AXI / AMBA / Valid-Ready

Verification Test Plan

Functional Coverage & SVA

AI/GenAI in Verification

Education

Bachelor's or Master's in Electronics / Electrical / Computer Engineering

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our top leading Manufacturing client. If you're interested and your experience matches the requirement, we'd love to hear from you.

Job Title: IP /SoC verification

Location: Hyderabad

Duration: 12 Months

Job Description

We are looking for an experienced IP Design Verification Engineer to join the ACP IP Verification team. The engineer will be responsible for developing, testing, and verifying complex IP blocks using SystemVerilog and UVM, working closely with Design, Architecture, and SoC teams.

Key Responsibilities

• Develop and maintain UVM-based verification environments and testbenches.
• Create and execute detailed verification test plans for IP blocks.
• Develop functional coverage and SVA assertions.
• Verify IP functionality at IP and SoC levels.
• Debug RTL and testbench issues and drive coverage closure.
• Work with Design, DV, Architecture, and SoC teams through verification and tapeout.
• Leverage AI/GenAI tools and methodologies to improve verification productivity and automation.

Mandatory Skills

• SystemVerilog & UVM
• IP / SoC Design Verification
• AXI / AMBA / Valid-Ready or similar protocols
• Verification Test Plan creation
• Functional Coverage & SVA
• AI/GenAI usage in Verification

Qualification

• Bachelor's or Master's degree in Electrical / Electronics / Computer Engineering or related field.
• 5+ years of hands-on ASIC/IP/SoC Design Verification experience.