Immediate hiring for Analog Circuit Design for (BLR & HYD Location)

Modernize Chip Solutions (MCS); Bengaluru; On-site; INR 1,500,000 - 2,500,000; Full time

Job summary

A leading semiconductor firm in India is seeking a Senior Analog Circuit Design Engineer to develop high-speed SerDes PHY IPs. The ideal candidate will have extensive experience in analog and mixed-signal IC design, particularly with USB, DisplayPort, and PCIe standards. An M.S. or Ph.D. in Electrical Engineering is required. This is a full-time position ideal for a mid-senior level engineer looking to advance their career.

Qualifications

• 8+ years of experience in SerDes PHY development.
• Deep understanding of USB 3.x/4, DisplayPort, PCIe standards.
• Strong expertise in CDR, CTLE, PLL, and deserializer design.

Responsibilities

• Design and validate SerDes architecture for various interfaces.
• Develop, simulate, and verify critical design blocks.
• Collaborate with cross-functional teams to ensure design quality.

Skills

Analog/mixed-signal IC design experience

Signal integrity skills

Jitter analysis

Equalization skills

Education

M.S. or Ph.D. in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

HSPICE

Job description

Senior Analog Circuit Design Engineer – BLR & HYD, India

Modernize Chip Solutions (MCS) is hiring an experienced Analog Design Engineer to develop high-speed SerDes PHY IPs for advanced semiconductor nodes.

Job Responsibilities

• Design and validate SerDes architecture for USB, DisplayPort, and PCIe interfaces.
• Develop, simulate, and verify CDR, CTLE, PLL, and deserializer blocks.
• Collaborate with signal integrity, jitter analysis, and equalization teams.
• Use Cadence Virtuoso, Spectre, HSPICE, and layout verification tools to drive design quality.

Qualifications

• M.S. or Ph.D. in Electrical Engineering or related field.
• 8+ years of analog/mixed-signal IC design experience in SerDes PHY development.
• Deep understanding of USB 3.x/4, DisplayPort, PCIe Gen3/Gen4/Gen5 standards.
• Strong expertise in CDR, CTLE, PLL, and deserializer design.
• Proficiency in Cadence Virtuoso, Spectre, HSPICE, and layout verification tools.
• Excellent signal integrity, jitter analysis, and equalization skills.

Employment Type & Seniority

Full-time, Mid-Senior level.

How to Apply

Send your updated profile to [e-mail] or call 9900927620.

Industry

Semiconductor Manufacturing – Design.