Hiring Design Verification Engineers (C/C++) | Mirafra Technologies

Mirafra; Hyderabad; On-site; INR 1,400,000 - 2,300,000; Full time

Job summary

Mirafra Technologies is seeking Design Verification Engineers with 3–8 years of hardware verification and software development expertise in C/C++/Python. The role emphasizes CSR, AXI/APB/AHB verification, and AI/ML-driven methods, based in Hyderabad.

You will develop verification plans, validate register behavior, and collaborate across RTL, firmware, and architecture teams to optimize regression and coverage.

Qualifications

• 3+ years of Hardware Verification experience.
• Strong knowledge of SystemVerilog, UVM, and RAL.
• Proficiency in Python and C/C++.

Responsibilities

• Verify CSR and memory-mapped I/O blocks.
• Develop verification plans using SystemVerilog, UVM, and RAL.
• Validate register functionality, reset values, policies and protocols.
• Work on AXI/APB/AHB protocol verification.
• Develop test cases and automation using C/C++ and Python.
• Collaborate with RTL, firmware, and architecture teams.
• Contribute to AI/ML-based verification and coverage closure.

Skills

Hardware Verification

Software Development (C/C++/Python)

AI/ML Exposure

Tools

VCS

Xcelium

Questa

Job description

Mirafra Technologies is Hiring Design Verification (C/C++) Engineers

Location: Hyderabad

Experience: 3 to 8 Years

Notice Period: 0 to 30 Days

Mirafra Technologies is looking for talented Design Verification Engineers with strong hardware verification expertise, software development skills, and exposure to AI/ML-driven verification methodologies.

Key Responsibilities

• Verify Control & Status Registers (CSR) and memory-mapped I/O blocks.
• Develop and execute verification plans using SystemVerilog, UVM, and RAL.
• Validate register functionality, reset values, access policies, and protocol compliance.
• Work on AXI/APB/AHB protocol verification.
• Develop test cases and automation using C/C++ and Python.
• Collaborate with RTL, firmware, and architecture teams.
• Contribute to AI/ML-based verification, regression optimization, and coverage closure.

Required Skills

• 3+ years of Hardware Verification experience
• Strong knowledge of SystemVerilog, UVM, and RAL
• Experience with AXI/APB/AHB protocols
• Proficiency in Python and C/C++
• Experience with VCS, Xcelium, or Questa
• Strong debugging and SoC verification skills

Preferred Skills

• AI/ML exposure or experience working with AI Agents
• Firmware-Hardware Co-verification
• Formal Verification methodologies
• SystemRDL/IP-XACT knowledge

Must-Have Skills

• Hardware Verification
• Software Development (C/C++/Python)
• AI/ML Exposure