Hardware Design Engineer

DXC Luxoft; Hyderabad; On-site; INR 600,000 - 900,000; Full time

Job summary

Luxoft is seeking an IP Packaging Engineer to be onsite at AMD Hyderabad. The role involves packaging, validating and releasing IP blocks used across chip design projects, and debugging multi-component packaging and build/DV flows. You will coordinate findings with US-based counterparts across time zones.

The ideal candidate has 1–2 years of relevant experience, solid understanding of RTL-based design and verification, and strong Python/Shell scripting skills. Onsite work is required.

Qualifications

• 1–2 years in semiconductor design, verification or IP packaging.
• Fundamentals of chip design, RTL, testbenches and simulation flows.
• Experience debugging complex systems with multiple tools and scripts (Python, Shell).
• Strong written and verbal communication across time zones.
• Willingness to work onsite full-time at AMD Hyderabad (no remote).
• 2 years of experience in related domains.

Responsibilities

• Package, validate and release IP blocks used across chip design projects.
• Debug multi-component packaging, build and DV flows; document findings and communicate status across time zones.

Skills

Semiconductor design

RTL concepts

Python scripting

Shell scripting

Onsite at AMD Hyderabad

Cross-timezone communication

Tools

CI/CD pipelines

Build orchestration

Job description

Project description

This is a great opportunity to work as part of a highly regarded team to deliver leading-edge solutions.

Responsibilities

• IP Packaging Engineer onsite at AMD Hyderabad: package, validate and release IP blocks used across chip design projects, working with design, verification and build/tooling teams. Debug multi-component flows (packaging pipelines, build flows, DV environments) to root cause, document findings and communicate status across time zones with US-based counterparts.

SKILLS

Must have

• * 1 to 2 years of relevant professional experience in semiconductor design, verification, IP packaging or related domains
• * Working understanding of chip design fundamentals and design verification basics (RTL concepts, testbenches, simulation flows)
• * Demonstrated experience debugging complex systems: tracing failures across tools, scripts and design/verification/packaging flows to root cause (Python, Shell scripting)
• * High analytical skills; strong written and verbal communication across time zones
• * Willingness to work onsite full-time at AMD Hyderabad (no remote option)
• * Experience: 1 to 2 years

Nice to have

• * Understanding of hardware or software build systems (build orchestration, dependency management, CI/CD pipelines)
• * Hands-on experience with AI models as a power user or developer (prompting, tool-building with LLMs, AI coding assistants, AI in engineering workflows)