Packaging Engineer

Advanced Micro Devices, Inc.; Bengaluru; On-site; INR 2,500,000 - 4,500,000; Full time

Job summary

Advanced Micro Devices, Inc. in Bangalore, India seeks a Senior Packaging Engineer to lead end-to-end package design for complex products using AI-driven approaches and automation. You will collaborate across SI/PI, mechanical, and SOC teams to deliver high-quality, scalable packaging solutions.

The role requires a self-driven expert with ownership across programs and the ability to excel in fast-phase execution environments, applying AI and automation to improve productivity and design quality.

Qualifications

• Bachelor’s or higher in Electrical or Computer Engineering.
• 2+ years in substrate design, silicon bridge, or interposers.
• Experience with 2.5D/3D packaging (interposers, chiplets).
• Hands-on with EDA tools: Cadence SIP/APD, Synopsys 3DICC.

Responsibilities

• End-to-end package design execution for complex products balancing performance, cost, quality, and schedule.
• Handle multiple concurrent design programs in fast-paced, high-pressure environments.
• Develop substrate layouts, bump maps, and interposer designs for advanced packaging (2.5D/3D).
• Collaborate with SI/PI, mechanical, and SOC teams.

Skills

AI/ML knowledge

Cross-functional collaboration

Ownership & accountability

High-pressure environment

Education

Bachelor’s or higher in Electrical/Computer Engineering

Tools

Cadence SIP/APD

Synopsys 3DICC

Job description

SENIOR PACKAGING ENGINEER

THE ROLE:

Help turn “possibility” into “reality” every day. At AMD, we push the boundaries of what is possible by delivering innovative, high-performance computing solutions across data center, AI, and advanced packaging technologies.

We are seeking a highly experienced Senior Package Design Engineer to support complex package design execution. This role requires a self-driven technical expert who thrives in a fast-paced, dynamic, and high-pressure environment, and can deliver high-quality designs with speed, precision, and scalability.

The successful candidate will play a key role in advancing AMD’s packaging methodologies by leveraging AI-driven design techniques, automation, and next-generation workflows to address the increasing complexity of heterogeneous integration and advanced packaging architectures.

THE PERSON:

The ideal candidate is an experienced package or silicon physical designer who:

• Demonstrates strong ownership and accountability across multiple programs
• Excels in fast-phase execution environments with competing priorities
• Applies AI/ML and automation to improve design productivity and quality
• Operates with minimal supervision while influencing cross-functional teams
• Balances deep technical expertise with strong collaboration and communication skills

KEY RESPONSIBILITIES:

Design Execution & Technical Leadership

• Perform end-to-end package design execution for complex products, ensuring performance, cost, quality, and schedule targets are met
• Handle multiple concurrent design programs in a fast-paced and high-pressure environment
• Develop substrate layouts, bump maps, and interposer designs for advanced packaging (2.5D/3D, chiplet-based architectures)
• Drive design decisions through close collaboration with SI/PI, mechanical, and SOC teams

Cross-Functional Collaboration

• Partner with internal engineering teams, OSATs, and substrate suppliers to deliver optimized solutions
• Interface with stakeholders to communicate design status, risks, and mitigation strategies
• Contribute to design reviews, signoff readiness, and tapeout processes

Methodology & Continuous Improvement

• Define and enhance package design methodologies, flows, and best practices
• Drive improvements in layout efficiency, reuse, and design standardization

PREFERRED EXPERIENCES:

• Minimum 2+ years of experience in designing complex substrate design or Silicon Bridge or Interposers
• Proven ability to execute in multi-project, fast-phased, and high-pressure environments
• Strong experience in advanced packaging technologies:
  • 2.5D / 3D integration (e.g., interposers, chiplets)
• Hands-on experience with EDA tools such as:
  • Cadence SIP / APD
  • Synopsys 3DICC or equivalent
• Experience working with OSATs, foundries, and substrate vendors
• Solid understanding of Signal Integrity and Power Integrity fundamentals

ACADEMIC CREDENTIALS:

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field

LOCATION:

Bangalore, India

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.