FPGA Post Silicon Validation Engineer - Security

Altera; Bengaluru; On-site; INR 1,800,000 - 3,000,000; Full time

Job summary

Altera in Bengaluru, India seeks an experienced engineer to lead silicon validation for robust FPGA security. You will oversee device-level and IP-level validation of FPGA security features to ensure reliability and system integrity.

The role offers hands-on exposure to secure FPGA architectures, SoC bring-up, and system-level debug while collaborating with architecture, design, firmware, and platform teams to influence future secure FPGA products.

Qualifications

• Bachelor’s or Master’s degree in Electrical & Electronics Engineering, Computer Engineering, or related field.
• 8+ years of hands-on silicon validation experience with emphasis on FPGA/SoC security.
• Knowledge of hardware security concepts (secure boot, authentication, encryption, key storage, threat modeling).
• Hands-on system-level validation and debug across power-on, failure analysis, and silicon triage.
• Familiarity with FPGA/SoC architectures; Python scripting for automation; Verilog is a plus.

Responsibilities

• Develop validation strategies for FPGA, security features, aligned with architecture and business goals.
• Validate security features including secure boot, authentication, encryption, key management, and root‑of‑trust.
• Create and execute test cases and vectors for configuration robustness and negative testing.
• Perform device and system bring-up, debugging security violations, boot hangs across revisions.
• Collaborate with hardware, firmware, and board design teams on security-ready evaluation platforms.
• Work with evaluation boards and reference platforms to ensure interoperability and coverage.
• Drive validation methodology, automation, and infrastructure to improve test coverage and efficiency.

Skills

FPGA validation

Hardware security

System-level debug

Python automation

Verilog familiarity

Education

B.E./B.Tech in Electrical & Electronics or Computer Engineering

Tools

Verilog

Python

Job description

Job Description:

Job Description:

Join our high‑performance Silicon Validation team and play a critical role in enabling robust FPGA security for next‑generation FPGA and SoC devices. You will lead device‑level and IP‑level validation of FPGA, secure boot and root‑of‑trust features to ensure industry‑leading security, reliability, and system integrity.

This role offers hands‑on exposure to secure FPGA architectures, SoC bring‑up and system‑level debug, while collaborating closely with architecture, design, firmware, and platform teams to influence future secure FPGA products.

Key Responsibilities

• Develop comprehensive validation strategiesfor FPGA, security, aligned with device architecture, security requirements, and business objectives.
• Perform security feature validation, including secure boot, authentication, encryption, key management, root‑of‑trust, and protection against misconfiguration or unauthorized access.
• Create and execute test cases and vectorsfor configuration robustness, security corner cases, fault injection, and negative testing scenarios.
• Perform device and system bring‑up, debugging, security violations, boot hangs, issues across silicon revisions.
• Work with evaluation boards, reference platforms, and customer‑like systemsto ensure interoperability and real‑world usage coverage.
• Drive innovation in validation methodologies, automation, and infrastructure, improving test coverage, scalability, and efficiency for future FPGA and SoC generations.
• Collaborate with hardware, firmware, and board design teamson security‑ready evaluation platforms, influencing observability and debug capability.

Qualifications:

• Bachelor’s or Master’s degree inElectrical & Electronics Engineering, Computer Engineering, or related field.
• 8+ years of hands‑on silicon validation experience, with strong focus on FPGA configuration, security, SoC, or embedded processor subsystems.
• Strong knowledge ofhardware security concepts, such as secure boot, authentication, encryption, key storage, lifecycle states, and threat modeling.
• Hands‑on experience withsystem‑level validation and debug, including power‑on bring‑up, failure analysis, and silicon issue triage.
• Familiarity withFPGA and SoC architectures(strong advantage).
• Experience or familiarity withPython for automation, scripting, and test infrastructure; Verilog familiarity is a plus.

Job Type:

Regular

Shift:

Shift 1 (India)

Primary Location:

Bengaluru, Karnataka, India

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.