Firmware Developer

Evollabs; Hyderabad; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

Evollabs, a Hyderabad-based AI hardware company, is seeking an experienced embedded firmware engineer to join our team. You will build the low-level firmware foundation for our AI training ASIC, from secure boot to runtime management, with emphasis on reliability and performance.

Collaborate with silicon architects, Linux drivers, and validation teams to bring up PCIe, 400G Ethernet, and multi-die coordination.

Qualifications

• 5+ years embedded firmware on ASIC/SoC or accelerators.
• Experience with PCIe bring-up and memory subsystems.
• Reading schematics and debugging with JTAG/logic analyzers.

Responsibilities

• Implement secure boot chain and OTA updates.
• Bring up hardware: clocks, power, PCIe, NoC, SerDes.
• Develop 400G Ethernet firmware and RDMA offload.
• Design host mailbox protocols and Linux driver collaboration.

Skills

Embedded firmware

PCIe bring-up

High-speed interfaces

RTOS debugging

System-level thinking

Tools

OpenOCD

JTAG

QEMU

CI/CD tooling

Job description

We are a tech company specializing in the design and development of cutting‑edge, customized server hardware solutions optimized for artificial intelligence and machine learning applications. Our mission is to empower businesses and researchers to accelerate their AI initiatives by providing them with high‑performance, scalable, and energy‑efficient hardware infrastructure.

As a rapidly growing company at the forefront of AI hardware innovation, we are constantly seeking talented and motivated individuals to join our team. We offer a dynamic and challenging work environment, with opportunities to make a significant impact on the future of AI technology.

Your Mission

Build the low‑level firmware foundation that brings our next‑generation AI training ASIC to life — from secure boot to runtime management, PCIe bring‑up to multi‑die coordination. Your code will be the critical bridge between our custom silicon and the AI workloads that will reshape industries. This is where hardware meets software, where every microsecond matters, and where your expertise directly accelerates AI breakthroughs for our customers worldwide.

What You'll Own

• Boot & Security: Implement our secure boot chain (BootROM → PBL/SBL → RTOS), device identity, attestation, anti‑rollback, and field updates that protect our customers' valuable AI models and data.
• Hardware Bring‑Up: Initialize clocks, power, HBM, PCIe, NoC, and SerDes PHYs — often before our silicon arrives (emulation/FPGA), ensuring first‑time‑right deployment.
• High‑Speed Networking: Bring up 400G Ethernet interfaces, configure MAC/PCS/FEC layers, and coordinate with network stack for RDMA offload engines essential for distributed AI training.
• Runtime Excellence: Power/thermal control, DVFS, watchdogs, RAS (ECC, crash dumps), and error recovery that delivers the 99.99% uptime our datacenter customers demand.
• Host Communication: Design mailbox protocols, MSI/MSI‑X, DMA coordination, and health reporting with our Linux driver team to enable seamless integration.
• Telemetry & Observability: Unified event tracing with synchronized timestamps (PTP/PHC) giving our customers unprecedented visibility into their AI infrastructure.
• Multi‑Die Scaling: Discovery, link training, topology management, and load‑balancing hooks across chiplets — because AI models keep growing.
• Validation & Documentation: Own bring‑up guides, scripted tests, HIL/emulation validation, and HAL/config schemas that enable our global support team and customers.

You’ll Collaborate With

Our silicon architects designing the next breakthrough in AI compute, Linux driver engineers building the software stack, security teams protecting customer assets, and system validation engineers ensuring enterprise reliability — together, we’re building the infrastructure that makes AI accessible and powerful.

Required Qualifications

• 5+ years embedded firmware (C/C++/Rust) on ASIC/SoC or GPU‑like accelerators
• Proven experience with one of the complex high‑speed subsystems is a must: PCIe bring‑up (enumeration, BARs, MSI‑X, DMA engines), memory subsystems (HBM/GDDR/DDR), high‑speed Ethernet 100G+
• Configuration and management of clock/power domains, and RAS features
• Comfortable reading schematics, register specs, and debugging with JTAG/logic analyzers
• Strong documentation and code review habits — your code will be the foundation others build upon
• Systems thinking: understanding how firmware decisions impact the full stack from silicon to application

Preferred (Nice‑to‑Haves)

• RISC‑V/ARM64 + TrustZone/TEE or secure enclave development
• 400G Ethernet firmware experience: MAC/PCS configuration, FEC modes, RDMA/RoCE offload, and 56G/112G SerDes bring‑up
• Hands‑on with secure boot (UEFI/coreboot/PBL/SBL) and cryptographic signing/verification
• Secure provisioning (OTP/fuses, cert injection) for production deployment
• Compliance (UEFI/ACPI/PCIe), SBOM, or safety certifications
• Experience with systematic design approaches (INCOSE principles, V‑model, requirements traceability)

Success in 6–9 Months

• Secure boot & OTA update flow validated on FPGA/emulation — customer data protected from day one
• PCIe + mailbox protocol stable under stress with Linux driver — plug‑and‑play in any datacenter
• Runtime services (power/thermal/DVFS) telemetry‑rich and reliable — meeting SLA requirements
• Unified tracing with synchronized timestamps exposed to host — full stack observability achieved
• Bring‑up docs + automated validation cover golden paths & recovery — enabling global deployment

Our Development Approach

We believe firmware is mission‑critical infrastructure that demands both innovation and rigor. We invest in architecture, testing, and standards compliance because our customers depend on our platform to run their most important AI workloads. We move fast when prototyping, but we measure twice and cut once when it comes to production firmware.

Tools & Standards We Use

Build & CI: CMake/Bazel, GitLab CI/CD, Coverity, PC‑lint
Debug & Validation: OpenOCD/pyOCD, JTAG/SWD, logic analyzers, QEMU/emulation
Standards: PCIe 5.0, 400GbE/IEEE 802.3, UEFI/ACPI where applicable, TCG security guidelines
Languages: C17/Rust, Python (tooling/testing)

Why This Role Matters

The AI revolution needs more than just algorithms — it needs the high‑performance, energy‑efficient hardware to run them at scale. Your firmware expertise will directly enable researchers to train larger models, businesses to deploy AI faster, and innovators to push the boundaries of what’s possible. This isn’t just another embedded role; it’s your chance to build the foundation of AI infrastructure that will power the next decade of technological advancement.

Ready to accelerate the future of AI from the firmware up?

Join us in our mission to democratize AI compute — where your firmware expertise becomes the bedrock of tomorrow's AI breakthroughs.