Experienced Engineer - ASIC Design

Ericsson GmbH; Chennai District; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

Ericsson GmbH is establishing new R&D in Chennai and seeks skilled ASIC IP Designers. As part of this innovative team, you'll develop and optimize design methodologies, ensuring advancements in 5G and 6G technologies. You’ll collaborate cross-functionally, working with talented engineers globally.

We require a Bachelor's in electrical or computer engineering with at least 5 years of related experience. Key skills include SystemVerilog and scripting languages. Ericsson offers a diverse workplace, committed to equal opportunities.

Qualifications

• 5+ years industry experience in ASIC IP Design.
• High attention to detail and commitment to quality.
• Proficient in English with strong communication skills.

Responsibilities

• Develop ASIC IP blocks and subsystems for 5G and 6G.
• Generate documentation throughout the design lifecycle.
• Collaborate with IP Architects and verification engineers.

Skills

ASIC technology understanding

SystemVerilog

RTL static sign-off tools (SpyGlass)

Scripting languages (TCL, Python)

AMBA-based designs (AXI, CHI)

SystemVerilog Assertions

Education

Bachelor's degree in electrical or computer engineering

Tools

Cadence design suites

Synopsys design suites

Jenkins

SimScope

Jira

Job description

Join our Team

We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow’s mobile standards. Ericsson System on a Chip (SoC) devices are custom‑made for mobile networks and span across the Ericsson Radio System – RAN Compute, Radio and Transport – to enable communication service providers to surpass the expectations of their end‑customers. At our state‑of‑the‑art design centers, we don’t just follow industry trends – we set them. By leveraging cutting‑edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you’ll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, you’ll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork.

You will do

• Develop ASIC IP blocks and subsystems, contributing to the advancement of 5G and 6G communication technology.
• Develop part of a design, whether at the block or subsystem level.
• Generate comprehensive documentation throughout the design lifecycle.
• Perform digital design and conduct all RTL sign‑off checks.
• Continuously enhance and optimize design methodologies and processes.
• Collaborate with IP Architects to break down requirements and create detailed IP architecture and design specifications.
• Work closely with verification engineers to review and refine verification plans.
• Build competence in the technical domain.
• Engage in cross‑team collaboration to ensure successful project delivery.

Required Qualifications

• Bachelor's degree in electrical or computer engineering.
• 5+ years industry experience in ASIC IP Design.
• Experience in/with:
  • Understanding of ASIC technology, design environments, and methodologies.
  • SystemVerilog.
  • RTL static sign‑off tools such as SpyGlass.
  • Scripting languages like TCL, Python, or similar.
  • AMBA-based designs such as AXI and CHI.
  • SystemVerilog Assertions.

Additional Requirements

• Experience with Cadence and Synopsys front‑end and middle‑end design suites.
• Team‑oriented, prioritizing team success within the team, across teams, and across sites over individual results. Experienced at communicating and meeting expectations within and across teams in an agile environment.
• High attention to detail and commitment to quality.
• Strong focus on meeting project deadlines and deliverables.
• Proficient in English, with strong communication skills.

Preferred Skills

• Understanding of radio access systems and their components.
• Expertise in low‑power design, including specifying power intent using UPF or similar standards.
• Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., SimScope), issue‑tracking (e.g., Jira).
• Experience designing one or more of the following hardware domains:
  • ARM‑based embedded microcontroller systems including their control and interface peripherals.
  • Wireless infrastructure specific protocols and interfaces and protocols.
  • Implementation of hardware‑based digital signal processing systems (filters, adaptation, etc.).

All academic credentials must be from recognized and accredited institutions and are further subject to verification.

Location: Chennai, India.

Ericsson is proud to be an Equal Opportunity Employer.