Ethernet IP Design Application Engineer

844 Altera Semiconductor Technology India Pvt. Ltd.; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

844 Altera Semiconductor Technology India Pvt. Ltd. is seeking an experienced Ethernet IP Design Application Engineer in Bengaluru, Karnataka. The ideal candidate will lead design validation for Ethernet IPs and act as a technical interface for customers, optimizing performance and resolving issues.

Candidates should possess a Bachelor's or Master’s degree in Electrical Engineering with 5 to 7 years of experience and strong programming skills in relevant languages. Join us in delivering high-quality FPGA solutions!

Qualifications

• Minimum 5 to 7 years’ experience in relevant engineering fields.
• Hands-on programming experience in VHDL, Verilog, C/C++, Python, Perl, or TCL.
• Strong foundation in Digital Logic Design and Circuit Design.

Responsibilities

• Lead design bring‑up and validation for Ethernet IPs across speeds.
• Act as the primary technical interface for customers.
• Create high‑quality technical collateral and collaborate with cross‑functional teams.

Skills

VHDL

Verilog

C/C++

Python

Perl

TCL

Education

Bachelor’s or Master’s degree in Electrical Engineering

Job description

Job Overview

Altera is focused on delivering high-quality, timely, and differentiated FPGA solutions to customers. We are seeking an experienced Ethernet IP Design Application Engineer with strong expertise in the Networking/Ethernet domain.

Key Responsibilities

• Lead design bring‑up and validation for Ethernet IPs across speeds: TSE, Multirate PHY IP, 10G, 25G, 40G, 50G, and 100G, including features such as Auto‑Negotiation/Link Training (AN/LT) and IEEE 1588 Precision Time Protocol (PTP).
• Act as the primary technical interface for customers, supporting debugging, issue resolution, and performance optimization.
• Highlight Ethernet IP use models and demonstrate performance metrics.
• Create high‑quality technical collateral, including user guides, reference designs, technology demonstrations, and validation tools.
• Collaborate closely with cross‑functional teams (Design, Validation, Product Engineering, and Sales) to reproduce and debug customer issues, drive resolution and root‑cause analysis, validate protocol compliance and performance, and provide actionable feedback to improve IP quality and customer experience.

Qualifications

• Minimum 5 to 7 years’ experience with a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Hands‑on programming experience in VHDL, Verilog, C/C++, Python, Perl, or TCL.
• Preferred: experience with FPGA‑based design and development, strong foundation in Digital Logic Design and Circuit Design, exposure to Networking/Ethernet protocols and architectures, and understanding of customer‑facing roles including basic business, sales, or marketing principles.
• Education: Bachelor’s degree with 7+ years, or Master’s degree with 5+ years.

Additional Information

Job Type: Regular Shift: Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations: Regus, Madhapur.

Equal Employment Opportunity Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.