Emulation Engineer

Sykatiya Technologies Pvt Ltd

Hyderabad, Bengaluru

On-site

INR 900,000 - 1,500,000

Full time

6 days ago
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Job summary

Sykatiya Technologies Pvt Ltd in India invites an experienced Emulation Engineer to join our hardware verification team in Hyderabad. You will work on emulation flows, bring-up, and performance optimization across Cadence Palladium, Synopsys ZeBu, and Siemens Veloce/Portium.

Responsibilities include model creation, debugging, waveform analysis with Verdi/SimVision, and scripting workflows to streamline emulation.

Qualifications

  • Experience with emulation flows and verification processes.
  • Hands-on experience with emulation platforms (Palladium, ZeBu, Veloce/Portium).
  • Proficiency in Verilog/VHDL and SystemVerilog.
  • Experience in model creation, bring-up, debugging, and performance analysis.

Responsibilities

  • Develop and optimize emulation flows and verification protocols.
  • Create emulation models, perform bring-up and debugging.
  • Analyze performance and optimize throughput of emulation runs.
  • Integrate transactors and bring-up workflows; automate tasks.

Skills

Emulation flows
Verilog
VHDL
SystemVerilog
C/C++
DPI
Script automation
Waveform debugging
Teamwork

Tools

Cadence Palladium
Synopsys ZeBu
Siemens Veloce/Portium

Job description

Role & responsibilities

Job Title: Emulation Engineer


Experience: As per requirement


Location: Bangalore / Hyderabad


Job Description

We are looking for an experienced Emulation Engineer with a strong understanding of emulation flows, methodologies, and hardware design verification.


Required Skills & Experience


  • Good understanding of emulation flows, methodologies, and design verification processes.

  • Hands-on experience with emulation platforms such as Cadence Palladium, Synopsys ZeBu, and Siemens Veloce/Portium.

  • Experience in emulation model creation, design bring-up, and debugging.

  • Experience in emulation model performance analysis and optimization.

  • Hands-on experience in transactor integration and bring-up.

  • Proficiency in Verilog and VHDL.

  • Experience with C/C++, DPI, and SystemVerilog.

  • Experience in scripting and automation of emulation flows.

  • Familiarity with waveform debugging tools such as Verdi and SimVision.

  • Knowledge of low-speed and high-speed protocols.

  • Strong analytical, debugging, communication, and teamwork skills.


Referrals are highly appreciated!

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