DSP Engineer

NXP Semiconductors; Bengaluru; On-site; INR 2,000,000 - 4,000,000; Full time

Job summary

NXP Semiconductors in Bengaluru is seeking a DSP Engineer for the Automotive Ethernet PHY team. You will implement DSP algorithms, help realize PHY architecture, and support verification and backend teams throughout the product lifecycle.

Responsibilities include RTL for DSP datapath blocks, developing MATLAB/Python models, and collaborating with verification, DFT, and system teams to meet timing and constraints.

Qualifications

• Strong DSP and communication systems fundamentals.
• Hands‑on experience with PHY‑layer DSP blocks.
• RTL design expertise (Verilog/SystemVerilog).
• MATLAB, Simulink, Python, C/C++ modeling experience.
• Understanding of synthesis, STA, CDC, linting flows.

Responsibilities

• Implement and optimize DSP architecture for Automotive Ethernet PHY (100/1000BASE‑T1, Multi‑Gig).
• Develop high‑quality RTL for DSP datapath blocks (filters, EQ, echo canceller, FFE/DFE, AGC, timing recovery).
• Work with Verification/Validation for debugging, coverage closure, and model correlation.
• Collaborate with DFT, System Architecture, IC Integration, and Backend teams for constraints and timing closure.
• Develop MATLAB/Python models and support system‑level analysis.

Skills

DSP fundamentals

PHY‑layer DSP blocks

RTL design (Verilog/SystemVerilog)

MATLAB/Simulink

Python/C++ modeling

Synthesis/STA/CDC/linting

Communication systems

Tools

Verilog/SystemVerilog

MATLAB/Simulink

Python

C/C++

Job description

We are looking for a DSP Engineer to join our Automotive Ethernet PHY team. You will work closely with the DSP Architect to implement DSP algorithms, contribute to PHY architecture realization, and support verification, validation, and backend teams throughout the product lifecycle.

Key Responsibilities

• Implement and optimize DSP architecture for Automotive Ethernet PHY (100/1000BASE‑T1, Multi‑Gig).
• Develop high‑quality RTL for DSP datapath blocks (filters, EQ, echo canceller, FFE/DFE, AGC, timing recovery).
• Work with Verification/Validation for debugging, coverage closure, and model correlation.
• Collaborate with DFT, System Architecture, IC Integration, and Backend teams for constraints and timing closure.
• Develop MATLAB/Python models and support system‑level analysis.

Required Skills

• Strong DSP and communication systems fundamentals.
• Hands‑on experience with PHY‑layer DSP blocks.
• RTL design expertise (Verilog/SystemVerilog).
• MATLAB, Simulink, Python, C/C++ modeling experience.
• Understanding of synthesis, STA, CDC, linting flows.

Good to Have

• Experience with Automotive Ethernet PHY development.
• Knowledge of DFT, post‑silicon bring‑up, and backend timing closure.
• Exposure to UVM environments and formal verification.

More information about NXP in India... #LI-7013 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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