DFT Staff Engineer

Qualcomm; Dadri; On-site; INR 2,500,000 - 5,000,000; Full time

Job summary

Qualcomm India Private Limited is seeking an ASIC/DFT engineer to define, model, design, verify, and document IP/SoC across high-performance, low-power products. Role involves working with global teams to determine execution paths and deliver robust designs.

8+ years in ASIC/DFT, hands-on with DFT concepts, scan insertion, ATPG, timing fixes, and scripting. Candidates should be capable of multi-tasking and adapting to new tools while communicating effectively in English.

Qualifications

• Bachelor's degree in Science/Engineering with 4+ years ASIC experience.
• Master's degree with 3+ years ASIC work experience.
• PhD with 2+ years ASIC design/verification experience.
• 8+ years experience in ASIC/DFT with strong DFT knowledge.

Responsibilities

• Define, model, design, verify, and document IP/SoC in ASIC/DFT contexts.
• Collaborate with cross-functional groups to determine product execution path.
• Hands-on experience in scan insertion, ATPG, and timing fixes.
• Experience with RTL lint tools and ATPG tools (TK, TetraMax).
• Ability to work in international teams and adapt to new tools/methodologies.

Skills

Problem solving

Communication

Teamwork

English proficiency

Learning agility

Education

Bachelor's degree or equivalent

Master's degree or equivalent

PhD or higher

Tools

TetraMax/DFTMax

Cadence Encounter Test

spyglass RTL lint

TK

Job description

Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > ASICS Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Additional Job Description

• 8+ years experience in the area of ASIC/DFT
• In depth knowledge of DFT concepts
• In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis
• Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations
• Expertise in scripting languages such as perl, shell, etc.
• Experience in simulating test vectors
• Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax)
• Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus
• Ability to work in an international team, dynamic environment
• Ability to learn and adapt to new tools and methodologies.
• Ability to do multi-tasking & work on several high priority designs in parallel.
• Excellent problem solving skills
• Excellent communication and team work skills and good English is required

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