DFT Senior Engineer

Broadcom; Bengaluru; On-site; INR 1,400,000 - 2,800,000; Full time

Job summary

Broadcom is seeking a DFT capable engineer to drive architecture, test insertion, and verification for ASIC products. You will generate patterns, improve coverage, and support post-silicon debug and yield initiatives.

The role requires hands-on experience with DFT concepts (ATPG, MBIST, IJTAG) and scripting (Perl, shell). Collaboration with Physical Design and STA teams is essential, with potential external customer interaction.

Qualifications

• Bachelor's degree with 5+ years of relevant experience or Master's with 3+ years.
• Strong understanding of DFT concepts and practical experience in ATPG/MBIST/IJTAG.
• Experience with DFT insertion, verification, and pattern generation.

Responsibilities

• Lead DFT architecture and test insertion activities for Broadcom APD ASICs.
• Perform verification, coverage improvement, and vector generation for DFT.
• Coordinate post-silicon debug and yield improvement efforts with cross-geo teams.
• Collaborate with Physical Design & STA for DFT-mode timing closure; interact with customers as needed.

Skills

DFT concepts

ATPG

MBIST

IJTAG

Pattern generation

Vector simulation

Post-silicon debug

Perl scripting

Education

Bachelor's degree + 5+ years

Master's degree + 3+ years

Tools

Mentor Graphics Tessent Shell

Job description

Job Description

The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.

The candidate should have in-depth knowledge of DFT concepts and should be experienced in various aspects of DFT -ATPG, MBIST & IJTAG. The candidate should have worked on DFT insertion & verification, pattern generation, coverage improvement, vector simulation, post-silicon debug. Strong problem solving & debugging skills are a must. Expertise in scripting languages such as perl, shell, etc. is an added advantage.

Experience with either Mentor Graphics DFT tools (Tessent Shell) is highly desirable.

The candidate should have worked with team across multiple geographies. The candidate should be able to handle his/her work independently. The candidate should possess excellent communication skills.

Educational qualification & Experience Level : Bachelor's degree with 5+ years of relevant experience or Master's degree with 3+ years of relevant experience

R027637