DFT Engineer

Broadcom

Bengaluru

On-site

INR 4,000,000 - 7,000,000

Full time

7 days ago
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Job summary

Broadcom, Inc. in Bengaluru invites an experienced DFT engineer to drive silicon bring-up and yield improvements. You will develop MBIST/ATPG patterns, perform scan insertion and lint checks, and collaborate with ATE teams to optimize test coverage.

You will work across design, verification and implementation teams during the DFT design phase and support silicon bring-up with ATE and product development teams, influencing methodology and outcomes.

Qualifications

  • Bachelors in Engineering with 8+ years of related experience, or Masters with 6+ years.
  • Experience in silicon bring-up and yield improvement.
  • Strong DFT knowledge and RTL lint checking.
  • Experience in MBIST, scan compression/insertion, ATPG.
  • Proficiency with Perl or scripting languages.
  • Strong communication and collaboration with cross-functional teams.

Responsibilities

  • Collaborate with ATE engineer on yield improvement and analysis.
  • Develop ATE patterns, manage hand-off, and perform silicon debugging.
  • Participate in block and chip-level DFT implementation and related tasks.
  • Perform DFT lint checking, MBIST architecture, logic insertion, and scan insertion.
  • Execute ATPG and pattern simulation for MBIST and scan.
  • Collaborate with design, verification, and implementation teams during DFT design and with ATE/product teams during silicon bring-up.
  • Engage with cross-functional teams to enhance DFT methodology.

Skills

DFT techniques
RTL lint
Scan insertion
ATPG process
MBIST architecture
Pattern development
Silicon bring-up
MBIST debugging
Perl scripting
Mentor Tessent
Synopsys DFT tools
Digital logic
Communication
Interpersonal skills
Yield improvement

Education

Bachelors in Engineering
Masters in Engineering

Tools

Mentor Tessent
Synopsys DFT tools

Job description

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job.2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:As a member of our team, you will be responsible for various aspects of DFT, including MBIST and scan insertion, ATPG, ATE pattern development, and yield analysis.Key Responsibilities:Work closely with the ATE engineer on yield improvement and analysis.Develop ATE patterns, manage the hand-off process, and perform silicon debugging.Participate in block and chip-level DFT implementation, developing and executing all related tasks.Work on DFT lint checking, MBIST architecture, logic insertion, and scan insertion using industry-standard tools.Perform ATPG and pattern simulation for both MBIST and scan.Collaborate with the design, verification, and implementation teams during the DFT design phase, and with the ATE and product development teams during silicon bring-up.Engage with various cross-functional team members, with opportunities to enhance our DFT design methodology.Required Qualifications:Bachelors in Engineering and 8+ years of related experience or Masters degree and 6+ years of related experienceRequired experience in silicon bring-up and yield improvement.Solid understanding of DFT techniques.Proven experience in RTL lint checking, scan compression, scan insertion, and the ATPG process.Experience in MBIST architecture and insertion.Experience in analyzing and debugging simulation failures.Solid understanding of digital logic fundamentals.Strong knowledge of the Mentor Tessent/Synopsys DFT and simulation tool suite.Proficiency with Perl or other scripting languages.Strong communication and interpersonal skills.Plus: Experience in STA constraint development in DFT modesBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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