Design Verification Engineer - AI/ML Hardware Acceleration

Google India Pvt Ltd; Bengaluru; On-site; INR 1,500,000 - 1,900,000; Full time

Job summary

Google in Bengaluru seeks a Design Verification Engineer for Cloud Silicon to shape AI/ML hardware acceleration. You will verify TPU architecture and integrate it within AI/ML systems, owning the full verification life-cycle from planning to coverage closure.

You will build constrained-random environments and collaborate with design engineers on challenging verification scenarios. Join a team driving cutting-edge TPU technology powering Google's AI workloads at scale, ensuring performance and

Qualifications

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• 1 year of experience with UVM verification methodology.
• 1 year of experience verifying IP/SoC/vector CPUs.
• Experience with SystemVerilog, SVA, and functional coverage.

Responsibilities

• Plan verification of digital design blocks with design engineers.
• Identify and write coverage measures for stimuli and corner cases.
• Debug tests with design engineers to ensure functionally correct design blocks.
• Create a constrained-random verification environment using SystemVerilog and UVM.
• Measure verification progress toward tape-out.

Skills

SystemVerilog

SVA

Functional coverage

UVM

IP/SoC verification

Education

Bachelor's in Electrical Engineering

Master's in Electrical Engineering

Tools

Industry-standard simulators

Version control systems

Regression systems

Job description

Design Verification Engineer, Cloud Silicon

Minimum qualifications

• Bachelor's degree in Electrical Engineering, or equivalent practical experience.
• 1 year of experience with verification methodology such as universal verification methodology (UVM).
• 1 year of experience in the verification of IP designs such as IP, SoC, vector CPUs, etc.
• Experience with SystemVerilog, SVA, and functional coverage.

Preferred qualifications

• Master's degree in Electrical Engineering, or a related technical field.
• Experience with industry-standard simulators, revision control systems, and regression systems.
• Experience with the full verification life-cycle.
• Experience in Artificial Intelligence/Machine Learning (AI/ML) Accelerators or vector processing units.
• Excellent problem-solving and communication skills.

About the job

In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will own the full verification life-cycle from verification planning and test execution to coverage closure, with an emphasis on meeting stringent AI/ML performance and accuracy goals, build constrained-random verification environments capable of exposing corner-case bugs and ensuring the reliability of Artificial Intelligence/Machine Learning (AI/ML) workloads on Tensor Processing Unit (TPU) hardware. You will collaborate closely with design and verification engineers in active projects and perform verification. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios.
• Identify and write all types of coverage measures for stimulus and corner-case.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Measure to identify verification holes and to show progress towards tape-out.
• Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).

Experience Level Senior Level