Design Engineer - Validation

NXP Semiconductors NV; Dadri; On-site; INR 3,500,000 - 5,500,000; Full time

Job summary

NXP Semiconductors NV is seeking a Senior Engineering Program Manager in Noida, India to lead comprehensive SOC product validation. The role involves planning, auditing, budgeting, and coordinating with global teams to ensure on-time validation across pre-silicon, emulation, and execution stages.

Candidates should have 15–25 years of experience in electronics/communications and hold a BE or ME. This regular, full-time opportunity is based in Noida with strong leadership exposure.

Qualifications

• Education: B.E. or M.E. in Electronics and Communications.
• 15–25 years of relevant experience.
• Regular full-time position for Noida, India.

Responsibilities

• Senior Engineering Program Manager responsible for comprehensive validation of SOC products per KPI definitions.
• Manage and support validation of multiple SOCs in parallel.
• Plan and drive validation milestones across pre-silicon, emulation, and execution phases.
• Coordinate with global teams, validation leads, chip leads, and SoC PMs to ensure resource readiness and budget adherence.
• Publish weekly execution status and track risks and dependencies.

Skills

Program management

SOC validation

Budget management

Cross-functional coordination

Audits

Resource planning

Hiring

Education

B.E./M.E. in Electronics and Communications

Tools

Sciforma

Emulation tools

Job description

Job Opening Type: Experienced Professional
Education: B.E. or M.E. in Electronics and Communications
Years of Experience: 15 -25 Yrs.
Regular / Temporary: Regular
Full-time / Part-time:
Country: India
Job Location(s): India-Noida

Senior Engineering Program Manager responsible for comprehensive validation of SOC Products as per Project key product indicators (KPI's) defined. Manage and support validation of multiple SOCs in parallel. Managing activities including Audits, Resource Management, Hiring, Budgets for the team for effective validation. Interacting with Global teams and representation for validation.
Planning :
Drives and updates Vxx quarterly validation project HC numbers working with the Validation Leads, functional managers, and other PMs. Coordinates verification and approval of the validation resource planning numbers with Val Leads, Chip Leads, and SoC PMs. Manages, updates, and ensures correctness of Sciforma validation data and scenario planner with Vxx numbers. Collects, coordinates, and maintains validation CapEx and OpEx requirements working with the Validation Leads, functional managers, and other PMs. Manages, tracks, and reports validation budget updates across projects, teams, and sites. Manages, tracks, and follows up with stakeholders on dependencies for projects; Notifies any issues to the Val Lead.
Pre-silicon Emulation :
Collects, manages, and drives emulation capacity requirements for each project working with Validation Leads and Emulation Design and Methodologies Team (CTO). Collects, coordinates, and maintains emulation requirements from various emulation stakeholders . Coordinates, schedules, and track test plans readiness with the validation teams as per emulation requirements & emulation milestones. Tracks and follows up with content owners on content readiness for various emulation milestones. Develops, updates, and publishes emulation coverage indicators for each project working with the Val Lead and content owners. Develops, updates, and publishes emulation model release indicators (number of models per milestones, delays, etc.)
Pre-silicon Readiness :
Tracks and follows up with content teams on content readiness for silicon. Collects and tracks boards requirements for projects. Collects and tracks parts requirements for projects. Schedules, tracks, and follows up on test plan reviews with the validation teams and relevant stakeholders before bring-up
Execution :
Manages priority and allocation of boards for silicon bring-up and execution working with the Val Lead. Tracks and publishes actual vs. plan boards deliveries to the teams. Manages allocation of lab benches working with the Val Lead for silicon bring-up and execution. Manages priority and allocation of parts working with the Val Lead for silicon bring-up and execution. Tracks and publishes actual vs. plan parts deliveries to the teams. Tracks, and follows up with content owners, validation execution tasks for various milestones for both pre- and post-silicon. Maintains and publishes validation execution indictors (actual vs. plan). Publishes weekly execution status using a standard report template. Manages, tracks, and publishes status of project risks.