Cellular 5G /4G Physical Layer Firmware Engineer

Apple Inc.; India; On-site; INR 1,800,000 - 2,800,000; Full time

Job summary

Apple Inc. in India seeks a Senior Cellular 5G/4G Physical Layer Firmware Engineer to design embedded firmware for high-performance wireless modems, interfacing HW/SW and implementing 3GPP protocols under tight latency and energy budgets.

The role requires 10+ years of experience in embedded software, strong C/C++, RTOS, silicon prototyping, emulation, debugging, and a deep understanding of HW/SW interfaces in high-speed subsystems.

Qualifications

• Experience with hardware control for physical layer 4G/5G data path processing.
• Understanding of 5G and 4G 3GPP protocols.
• Strong background in C/C++ and software engineering fundamentals.
• Experience with memory-constrained RTOS and concurrent programming.

Responsibilities

• Implement key 3GPP protocols and control/data path processing with tight budgets.

Skills

Hardware control for PHY

5G/4G 3GPP protocols

Linear algebra & DSP

Software engineering fundamentals

C and C++

RTOS & concurrent programming

HW/SW interfaces

Silicon prototyping & emulation

Debugging embedded systems

UART/JTAG/Oscilloscopes

Python or Perl scripting

Education

Higher degree in EE/CS

Tools

UARTs

JTAG

Oscilloscopes

RTOS tooling

Emulation/Virtual platforms

Job description

Cellular 5G /4G Physical Layer Firmware Engineer

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what’s considered feasible? As part of an extraordinary modem team, you’ll craft sophisticated & pioneering embedded firmware that deliver more performance in our products than ever before. You’ll work across subject areas to transform improved hardware elements into a single, integrated design. Join us, and you’ll help us innovate new wireless systems technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you’ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world.

Description

• Implement key 3GPP protocols and control/data path processing algorithms with very tight time, latency and energy budgets by interfacing to specialized cellular ASIC hardware.
• Examples of processing include 3GPP channels and procedures such as PDCCH, PDSCH, PBCH, PUCCH, PUSCH, PRACH, UL/DL HARQ, Tracking loops.
• Examples of 3GPP algorithmic areas include:
  • Channel Estimation
  • Channel State Feedback
  • Interference Cancellation
  • Cell Search and Measurement
  • Beam Measurement
• Work with systems engineers to refine signal processing algorithms for efficient firmware/hardware execution
• Work with silicon designers to define HW interfaces, processors, bus, DMA, accelerator, and memory subsystems.
• Specify, design, and implement the firmware architecture of an innovative mobile wireless communications system.
• Assist in the development of pre-silicon emulation systems/virtual platforms and use them for pre-silicon FW design and HW verification.
• Evaluate and implement pioneering tools for build, formal verification and test.
• Define methodologies and best practices.

Responsibilities

• As a Senior Cellular 5G/4G Physical Layer Firmware Engineer on this team, you will be at the center of the embedded 5G/4G/multimode cellular firmware effort within a silicon design group responsible for crafting and productizing state-of-the-
  art cellular SoCs. We are looking for someone with 10+yrs experience across all aspects of embedded software development, who thrives in a dynamic multi-functional organisation, is not afraid to debate ideas openly, and is flexible enough to pivot on constantly evolving requirements.

Minimum Qualifications

• Experience with hardware control for physical layer4G/5G data path processing
• Understanding of 5G and 4G 3GPP protocols
• Strong understanding of linear algebra and digital signal processing principles.
• Deep understanding of software engineering principles, and core computer science fundamentals.
• Fundamental facility with C and C++, compilers, build and source code control tools.
• Significant experience with memory constrained Real Time Operating Systems (RTOS) and concurrent programming.
• Solid understanding of computer architecture with particular emphasis on the HW/SW interfaces of high speed communication subsystems.
• Experience with silicon prototyping, emulation systems, and virtual platforms.
• Proficiency debugging embedded software systems. Familiarity with UARTs, JTAG, and oscilloscopes.
• Some mainstream OS application level development and Python or Perl scripting experience.

Preferred Qualifications

• PhD/Master's/Bachelor’s degree in electrical engineering, electronics and telecommunications, computer engineering or computer science is required.

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