CAD Verification Director

QUALCOMM, Inc.; Bengaluru; Presencial; INR 4.000.000 - 7.000.000; Jornada completa

Descripción de la vacante

Qualcomm India Private Limited seeks a visionary Director, Verification CAD Engineer to lead our verification CAD team and shape strategy across formal and dynamic verification. You will mentor engineers, collaborate with design and EDA partners, and drive scalable CAD solutions for cutting-edge silicon designs.

You will define roadmaps, advocate for assertion-based verification, and optimize CI/CD integration and tool interoperability to ensure robust validation across multi-site teams.

Formación

• Bachelor’s degree in Electrical/Electronics Engineering, Computer Engineering, or related field.
• 8+ years of hardware engineering or related work experience; 18+ years in total CAD/verification is stated in the job description.
• Experience deploying formal and dynamic verification methodologies at scale.

Responsabilidades

• Define and execute the long-term roadmap for CAD verification infrastructure for formal and dynamic methods.
• Lead a team of verification engineers focused on tooling, automation, and methodology.
• Architect and deploy formal verification flows including property checking and model checking.

Conocimientos

Leadership

Verification CAD

Scripting (Python/Perl/Tcl)

UVM/SystemVerilog

CI/CD tooling

Educación

Bachelor's or Master’s degree in Electrical/Electronics Eng., Computer Eng., or related field

PhD in related field (preferred)

Herramientas

Jasper

VC Formal

CI/CD tooling

Descripción del empleo

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

.We are seeking a visionary and technically accomplished Director, Verification CAD Engineer to lead our verification CAD team. This role is pivotal in shaping the strategy, architecture, and execution of verification methodologies that ensure the functional integrity of our cutting-edge silicon designs. As a senior leader, you will drive innovation in verification flows, mentor a high-performing team, and collaborate across design, verification, and EDA partners to deliver scalable, efficient, and robust CAD solutions.

Key Responsibilities

• Define and execute the long-term roadmap for CAD verification infrastructure supporting both formal and dynamic methodologies.
• Lead and grow a team of CAD engineers focused on verification tooling, automation, and methodology.
• Partner with design and verification leadership to align CAD strategy with project goals and technology trends.
• Architect and deploy formal verification flows including property checking, equivalence checking, and model checking.
• Evaluate and integrate formal tools (e.g., Jasper, VC Formal) into production environments.
• Promote assertion-based verification and formal coverage metrics across design teams.
• Oversee dynamic simulation infrastructure including UVM testbench support, regression automation, and coverage analysis.
• Optimize simulation performance and scalability across compute farms and cloud environments.
• Drive adoption of advanced techniques such as constrained-random testing, functional coverage, and hybrid formal-dynamic flows.
• Develop reusable scripts, APIs, and frameworks to streamline verification workflows.
• Ensure robust version control, CI/CD integration, and tool interoperability.
• Collaborate with EDA vendors to influence tool features and resolve technical challenges.

Required Qualifications

• Bachelor’s or Master’s degree in , Electrical/Electronics Engineering, Computer Engineering, or related field.
• 18+ years of experience in CAD or verification engineering, with significant leadership experience.
• Proven track record in deploying formal and dynamic verification methodologies at scale.
• Expertise in scripting languages (Python, Perl, Tcl) and CAD tool integration.
• Strong understanding of UVM, SystemVerilog assertions, and verification planning.
• Excellent communication, leadership, and cross-functional collaboration skills.
• Familiarity with AI/ML applications in verification and debug.
• Prior experience in managing global teams and multi-site verification initiatives.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.