ASIC Engineer, Emulation

Meta; Bengaluru; On-site; INR 4,500,000 - 7,000,000; Full time

Job summary

Meta is seeking an experienced Emulation Domain Expert to lead advanced emulation model builds and flows for next-generation silicon products within the Infra Silicon Enablement team. You will collaborate with cross-functional teams to drive emulation-based validation and bring-up for data center ASICs.

The role requires strong expertise in hardware emulation and HDL languages, plus the ability to mentor engineers and drive complex initiatives across stakeholders.

Qualifications

• Bachelor's degree in CS/CE or equivalent practical experience.
• 2+ years in hardware emulation, verification, prototyping, ASIC development cycles, pre/post silicon validation.
• Experience with Verilog, SystemVerilog, Python, C/C++.
• Ability to lead complex technical initiatives and mentor engineers.
• Experience with emulation platforms: Palladium, Protium, Zebu.
• Knowledge of PCIe, USB, Ethernet protocols.
• Experience collaborating with internal and external partners for ASIC/system development.
• Ability to communicate decisions to cross-functional stakeholders.
• Familiarity with model building, release, and qualification.
• Exposure to AI/SoCs networking bring-up/validation is a plus.

Skills

Hardware emulation

ASIC development

CI/CD automation

Verilog/SystemVerilog

Python/C++

Education

Bachelor's degree in CS/CE or equivalent

Tools

Palladium

Protium

Zebu

Job description

Meta is hiring ASIC engineers within the infrastructure organization. We are seeking a highly experienced Emulation Domain Expert to lead and drive advanced emulation model builds and flow for next-generation silicon products. As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with experienced engineers across the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.

• Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience


• 2+ years of experience with hardware emulation, verification, prototyping, ASIC development cycles, pre/post silicon validation, emulation methodologies, hybrid flows, CI/CD automation, and infrastructure


• Experience in Verilog, SystemVerilog, Python, C/C++ and/or similar languages


• Experience working with internal and external partners for ASIC and/or system development


• Demonstrated ability to lead complex technical initiatives and mentor other engineers


• Experience solving complex technical problems and communicating decisions to technical and non-technical stakeholders across cross-functional teams


• Exposure to PCIe, USB, Ethernet, and networking domain protocols


• Familiarity with industry best practices for model building, release, and qualification


• Knowledge of processor designs, GPUs, and the debug subsystem is highly desirable


• Experience with emulation model builds and flows on Palladium, Protium, and Zebu platforms


• Exposure to networking SoCs and AI SoCs, including bring-up, validation, and performance optimization in emulation environments


• Experience in driving improvements for emulation efficiency, automation, and capacity planning


• Experience with AI training and inference accelerators, including bring-up and validation