Analog/Mixed Signal PLL Analog Designers

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Qualcomm is seeking a Hardware Engineer in Bengaluru, India, to plan, design, and optimize analog and mixed-signal integrated circuits. The role involves collaborating with teams to deliver cutting-edge products.

Qualifications include a Bachelor's degree in a relevant field with a minimum of 6 years of design experience. Familiarity with SPICE and circuit simulation is vital. Qualcomm offers an opportunity to work on advanced technologies in an inclusive work environment.

Qualifications

• Minimum 6 years of transistor-level analog/mixed-signal design experience.
• Experience with SPICE simulators, ADEXL, and Virtuoso.
• Familiarity with custom analog layout and signal integrity.

Responsibilities

• Own the architecture design of analog and mixed-signal hard macros.
• Design multiple analog building blocks.
• Collaborate closely with various design teams.

Skills

Transistor-level analog/mixed-signal design experience

SPICE simulation

Experience in PLL design

Education

Bachelor's degree in Computer Science or related field

Master's degree in Computer Science or related field

PhD in Computer Science or related field

Tools

SPICE

ADEXL

Virtuoso

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring‑up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting‑edge, world‑class products. Qualcomm Hardware Engineers collaborate with cross‑functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Function

Qualcomm Mixed‑Signal IP team is actively seeking analog circuit designers with 6–12 years of experience to join our growing team in Bangalore, India (BDC). You will be directly involved in delivering analog and mixed‑signal integrated circuits for high‑speed PLL/DLL/LDO/Data Converter IPs for SoCs and supporting their integration into Qualcomm's Mobile, Auto, IoT, and Compute products on leading‑edge FinFET and advanced process nodes. Design goals include low‑power and low‑voltage analog designs for Qualcomm's low‑power wireless products.

Responsibilities

• Own the architecture, design, and development of analog and mixed‑signal hard macros for the PLL IP design team.
• Design multiple analog building blocks, including bias circuits, references, op‑amps, LDOs, VCOs/DCOs, and high‑speed custom digital blocks such as dividers and clock distribution.
• Perform custom circuit design in the latest FinFET CMOS process technologies, deliver hard macros, and support customer integration and testing.
• Set up, run, and analyze SPICE circuit simulations, and create behavioral models.
• Collaborate closely with layout, digital design, physical design, and HSIO Bench/ATE teams.
• Participate in internal customer requirement discussions to create clear design specifications.

Skills & Experience

• Minimum 6 years of transistor‑level analog/mixed‑signal design experience, preferably in PLL design, data converters (ADC/DAC), or other high‑speed applications.
• Experience using SPICE simulators, ADEXL, and Virtuoso.
• Familiarity with custom analog layout, parasitic optimization, post‑layout extraction, verification, and design review closure.
• Understanding of signal integrity in high‑speed wireline design is preferred.
• Scripting experience to automate circuit design and verification workflows.
• Ability to collaborate effectively with global cross‑functional teams and communicate technical concepts clearly through documentation and presentations.

Preferred

Mixed‑signal design experience, especially in PLL/DLL clocking architectures, high‑speed interfaces, SoC integration, advanced CMOS/FinFET nodes, and scripting

Keywords

Analog Circuit Design, Mixed‑Signal IP, PLL, DLL, LDO, Bias, Reference, VCO, DCO, Clock Distribution, ADC, DAC, SPICE, Virtuoso, ADEXL, FinFET, Analog Layout, Post‑Layout Simulation

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.