AI Compiler Engineer

Mulya Technologies; India; Hybrid; INR 900,000 - 1,300,000; Full time

Job summary

Mulya Technologies in Bangalore is seeking an AI/ML compiler engineer to architect and implement optimizations for graph compilers, targeting reduced latency and better hardware utilization.

You will collaborate with ML researchers, hardware engineers, and software teams to deploy AI models and drive compiler passes, fusion, quantization, and IR generation.

Qualifications

• Master’s degree in CS/EE; PhD preferred.
• 2-4 years in compiler development with AI/ML graph focus.
• Proficiency in MLIR, Torch-FX and related tools.
• Strong hardware knowledge: GPUs/TPUs/ASICs and optimization.
• Understanding of graph IRs, parsing and code generation.
• C++, Python or similar languages; open-source contributions a plus.
• Proven experience leading and mentoring teams.

Responsibilities

• Architect, design, and implement optimizations for AI model execution on graph compilers.
• Collaborate with ML researchers, hardware engineers, and software developers.
• Work on performance optimizations for neural networks: fusion, quantization, tiling.
• Develop compiler passes to convert AI models to IR for backends.
• Implement parsing, semantic analysis, and IR generation for DL frameworks.
• Research and integrate latest compiler and ML model optimization advances.
• Provide leadership and mentorship to the graph compiler team.

Skills

Compiler development

AI/ML graph compilers

C++, Python

Hardware optimization

Graph IR

Team leadership

Education

Master’s degree in Computer Science or Electrical Engineering (Ph.D. preferred)

Tools

MLIR

Torch-FX

Job description

Locations: Bangalore (Hybrid) /Remote

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Responsibilities

• Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization.
• Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges.
• Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations.
• Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR).
• Implement parsing, semantic analysis, and IR generation for deep learning frameworks.
• Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers.
• Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations.

Qualifications

• Master’s degree in Computer Science, Electrical Engineering, or related field (Ph.D. preferred).
• 2-4 years in compiler development, with a strong focus on AI or ML graph compilers.
• Proficiency in AI graph compiler frameworks (e.g., MLIR, Torch-FX)
• Solid background in hardware architectures (e.g., GPUs, TPUs, ASICs) and optimization techniques such as fusion, quantization, and tiling.
• Familiarity with neural networks operators and code generation.
• Strong understanding of intermediate representations, code parsing, and semantic analysis in compiler design.
• Proficiency in C++, Python, or other programming languages commonly used in compiler development.
• Open-source contributions to AI software frameworks and libraries is a plus
• Demonstrated experience leading and mentoring engineering teams with successful project delivery